Eight-way server backboard and double pinch plate interconnection system design method

Abstract

The present invention discloses an eight-way server backboard and double pinch plate interconnection system design method, and relates to the technical field of server board design. The method is characterized in that: by using a middle backboard and two UPI pinch plates, computing boards of two 4s systems are interconnected into an 8S system by the multi-physical layer partitioning based on NUMA;the middle backboard is located at the front of the computing board, is interconnected with the two computing boards for interaction of the UPI signal, the Misc signal, the timing signal, and the management signal, and is respectively connected with the two CPUs at the front end of the two computing boards through the connector of the middle backboard, so that interconnection between the CPUs atthe front end of the two computing boards is realized; and the two UPI pinch plates are respectively arranged behind the two computing boards, interacts the UPI signal, the Misc signal, and the timingsignal with the computing boards, and is respectively connected with the two CPUs at the back end of the two computing boards through the connector of the UPI pinch plates, so that interconnection between the CPUs at the back end of the two computing boards is realized.

Description

technical field [0001] The invention discloses a design method for an eight-way server backplane and double-guage board interconnection system, and relates to the technical field of server board design. Background technique [0002] Multiple processors and IO resources of the computer system can be divided on the physical layer, thereby dividing a multi-processor computer system into multiple independent multi-processor systems, and these divided computer systems can also be coupled as A complete computer system. Currently there is an 8-way server system, which is characterized by two independent computing nodes, each computing node is identical, and each computing node has 4 CPUs. At present, there are mainly two interconnection methods, one is interconnection with a separate backplane. This solution requires all 4 CPUs to be close to one side of the backplane to ensure that the UPI wiring distance meets the SPEC requirements. This design method reduces the amount of memo...

AI Technical Summary

Problems solved by technology

This design method reduces the amount of memory used, and cannot use the full memory mode; while the other uses a backplane plus a front gusset, because the Intel Purley platform limits the memory, it needs to be placed on both sides of the CPU.

Using a UPI pinch board for interconnection needs to make the size of the board card very large, which is easy to introduce new problems. The structure increases the design difficulty, the reliability is poor, and the pinch board also blocks the air duct in terms of heat dissipation, which cannot meet the heat dissipation requirements.

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