A Highly Compatible Programmable Neural Network Acceleration Array
A neural network and compatibility technology, applied in the direction of electrical program control, sequence/logic controller program control, etc., can solve problems such as poor performance, failure to meet performance requirements, and limit the development of deep learning intelligence
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[0015] The invention is described more fully hereinafter in reference to the examples illustrated in the illustrations, providing preferred embodiments but should not be considered limited to the embodiments set forth herein.
[0016] figure 1 Shown is a schematic diagram of the architecture of the highly compatible programmable neural network acceleration array of the present invention, wherein the central controller 11 is responsible for the global control of the deep learning neural network, and the feature vector transmitter 12 is responsible for transmitting the required information to all neural network computing unit chips 13. Feature vector.
[0017] The neural network computing unit slice of the present invention includes all basic deep learning algorithm computing modules, such as figure 2 As shown, the computing unit chip includes a programmable multiplication and addition unit 21 , a programmable activation unit 22 , an on-chip controller 23 , and a buffer 24 . ...
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