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Anti-interference design method applied to MCU reset system

A design method and high-level technology, applied in data reset devices, pulse processing, electrical components, etc., can solve the problems of occupying a large chip area, unstable filtering delay, etc., to achieve the effect of improving stability and flexible application

Inactive Publication Date: 2018-03-30
WUXI I CORE ELECTRONICS
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0003] Add an RC (resistor-capacitor) filter module on the key signal line inside the circuit. For a larger filter delay, RC will occupy a large chip area.
In addition, R and C are greatly affected by the process, and process fluctuations will also affect their values, resulting in unstable filter delay
Therefore, there are certain limitations in the design. Therefore, we propose an anti-jamming design method applied to the MCU reset system

Method used

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  • Anti-interference design method applied to MCU reset system
  • Anti-interference design method applied to MCU reset system
  • Anti-interference design method applied to MCU reset system

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Embodiment Construction

[0019] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0020] as follows figure 1 It is a schematic diagram of the logical structure of the anti-jamming design method. Among them, OR2: 2 input OR gate; Tfprn: T flip-flop triggered by rising edge and low level reset; INV: inverter; clk: input clock signal; MUX21: 2 to 1 data selector; SEL: data selection signal, SEL=0 selects D0, SEL=1 selects D1; ​​IN: input signal; OUT: output signal;

[0021] as follows figure 2 , SEL=0, signal transmission diagram (low-leve...

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Abstract

The invention discloses an anti-interference design method applied to an MCU reset system, and belongs to the technical field of anti-interference design in an MCU class integration circuit reset system. According to an MCU applied to a relatively complex environment, the work reliability is ensured, and the situation that a circuit is reset to enter a misoperation state due to external interference is not likely to happen. Meanwhile, as for the application environment with special requirements of reset time and the condition that interference signals of the application environment are weak, the MCU can be used for configuring reset signal output time of a word configuring system, and the reset system immediately responds to resetting after receiving a reset signal. Common reset modes in the MCU reset system include power-up reset, power-down reset, WDT (watchdog) reset, external reset and the like, and if one or more reset modes in the reset system are started, the whole system of theMCU is reset and starts to run again once a reset signal is generated.

Description

technical field [0001] The invention relates to the technical field of anti-jamming design in an MCU integrated circuit reset system, in particular to an anti-jamming design method applied in an MCU reset system. Background technique [0002] In the prior art, common anti-jamming designs include: increasing the capacitance between the power supply and the ground, stabilizing the internal power supply of the chip, and preventing abnormal reset of the circuit caused by power fluctuations; connecting resistors in series at the input end of the chip PAD (port), isolating interference signals, preventing High-frequency interference signals are serially inserted into the chip to cause abnormal operation of the circuit; RC (resistor-capacitor) filter modules are added to key signal lines inside the circuit to filter out high-frequency glitch signals to prevent abnormal operation of the circuit; for increasing the capacitance between the power supply and the ground, it is stable The...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/24H03K5/1252
CPCG06F1/24H03K5/1252
Inventor 唐映强陈恒江陈峰王炯翊
Owner WUXI I CORE ELECTRONICS
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