Circuit improving dynamic switch linearity in analog-to-digital converter

A technology of analog-to-digital converter and dynamic switch, applied in the direction of analog-to-digital conversion, code conversion, instrument, etc., can solve the problems of comparator imbalance, etc., reduce switching power consumption, improve linearity, improve driving ability and stability sexual effect

Active Publication Date: 2018-04-06
BEIJING MXTRONICS CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] The technical problem of the present invention is: to overcome the deficiencies of the prior art, use an array voltage booster to supply power to all compa

Method used

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  • Circuit improving dynamic switch linearity in analog-to-digital converter
  • Circuit improving dynamic switch linearity in analog-to-digital converter
  • Circuit improving dynamic switch linearity in analog-to-digital converter

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Embodiment Construction

[0036] The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0037] In a pipelined ADC, the input signal to the comparator remains constant during both the sample and hold phases and changes only when the sample and hold phases switch. Therefore, the gate voltage of the CMOS switch is also a fixed value in a fixed phase. Based on the above factors, the present invention can simplify the structure of the bootstrap switch. At the same time, because most of the comparators have the same working sequence, the present invention adopts a fixed array structure to supply power to the switch gate, and adjusts the number of array units and the size of the variable capacitance in the high-voltage power generation circuit according to the number of loads.

[0038] Such as figure 2 As shown, a circuit for improving the linearity of a dynamic switch in an analog-to-digital converter provided by the present inventio...

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Abstract

The invention discloses a circuit improving dynamic switch linearity in an analog-to-digital converter. The circuit is characterized by comprising a high voltage power generation circuit, a sampling phase clock voltage conversion circuit, and a holding phase clock voltage conversion circuit, wherein the high voltage power generation circuit mainly comprises N voltage boost units that are in parallel connection, each of the sampling phase clock voltage conversion circuit and the holding phase clock voltage conversion circuit comprises M clock voltage conversion units that are in parallel connection, the voltage boost unit mainly comprises seven inverters, two NOR gates, two NAND gates, two buffer units, six NMOS transistors and five capacitors, and the clock voltage conversion unit mainly comprises three PMOS transistors, one NMOS transistor, and a capacitor. The circuit has advantages of improving the performance of a comparator, lowering device imbalance, reducing chip area, loweringswitch power consumption, having strong output and drive capabilities, stable switch signals and so on.

Description

technical field [0001] The invention relates to a circuit for improving the linearity of a dynamic switch in an analog-to-digital converter, which is mainly used in a low-power pipeline analog-to-digital converter and belongs to the technical field of integrated circuits. Background technique [0002] High-speed and high-precision A / D converters have been widely used in measurement and control systems, radars, satellites, high-speed imaging, quadrature radio receivers, diversity radio receivers, communications and other fields. Driven by market demand in recent years, new technologies in high-speed and high-precision A / D converters continue to emerge. At present, research on pipeline A / D converter products in the industry mainly focuses on three aspects: increasing speed, improving precision and reducing power consumption. [0003] In the low-power design of the pipeline ADC, due to the power consumption limitation, the charging and discharging current of the key node capac...

Claims

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Application Information

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IPC IPC(8): H03M1/06H03M1/00H03M1/46
CPCH03M1/002H03M1/0604H03M1/466
Inventor 纪亚飞王宗明张铁良王瑛冯文晓李雪杨龙邴兆航郭瑞
Owner BEIJING MXTRONICS CORP
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