Power supply control circuit and method for memory

Abstract

Embodiments of the invention provide a power control circuit for memories. The power control circuit comprises a control port and a logic circuit, wherein the control port is used for controlling an input signal of the logic circuit; the logic circuit is used for outputting a high electric level or a low electric level according to the input signal; and the control port is furthermore used for starting ground control when logic circuit outputs the high electric level, and starting power control when the logic circuit outputs the low electric level. Visibly, the control port is capable of controlling internal signals of the logic circuit, and when a power management mode is started, the circuit can be managed according to states of internal nodes, so that the charging / discharging capacitance can be decreased while the aim of decreasing electric leakage is achieved, thereby decreasing the switching time, between a normal working mode and the power management mode, of systems, and decreasing the charging / discharging current during the switching.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a power supply control circuit and method for memory. Background technique [0002] Memory (Memory) is a memory device used to save information in modern information technology, and has a very wide range of applications. Power management for memory is an important related technology. [0003] Taking Static Random Access Memory (SRAM) as an example, the power management of SRAM is generally divided into three types in the processing of peripheral circuits: one is to disconnect the path between the power supply VDD and SRAM when it is not working ,Such as figure 1 As shown in (a); one is to disconnect the path between the power supply VSS and the SRAM when not working, such as figure 1 As shown in (b); one is a combination of the above two, that is, the above two exist at the same time, such as figure 1 (c) Shown to reduce the static leakage when the SRAM is not working. [...

AI Technical Summary

Problems solved by technology

[0004] However, in the power management of SRAM, due to the need to charge and discharge the circuit, it takes a long time to turn on or off the power management mode, and a large charge and discharge current will be generated during this process

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