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Ferroelectric memory and access method thereof

A technology of ferroelectric memory and access method, applied in the semiconductor field

Inactive Publication Date: 2018-06-01
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] Ferroelectric memory devices in the prior art mainly store "0" and "1" information through two different polarization states. Generally, only one byte can be stored based on one memory cell (that is, "0" and "1"). "1") information, increasing the storage capacity of each storage unit will increase the storage density accordingly and reduce the cost of the storage

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Embodiment Construction

[0026] It should be noted that, in the case of no conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and examples.

[0027] In order to enable those skilled in the art to better understand the solutions of the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only It is an embodiment of a part of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0028] It should be noted that the terms "first...

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Abstract

The invention provides a ferroelectric memory and an access method thereof. The ferroelectric memory comprises a field effect transistor and a plurality of ferroelectric capacitors which are arrangedin parallel, wherein the field effect transistor is formed on a substrate, and the field effect transistor comprises a gate, a gate dielectric layer, and a source / drain; and each ferroelectric capacitor comprises an upper electrode, a ferroelectric thin film and a lower electrode which are laminated in sequence, and each lower electrode is serially connected with the gate or serially connected with the source / drain by means of an auxiliary capacitor. The applicant discovers that polarization directions of the ferroelectric thin films in the parallelly-arranged ferroelectric capacitors deflectsequentially when a gradually increased bias voltage is applied to the ferroelectric capacitors which are connected with the field effect transistor in series, thus when the number of the parallelly-arranged ferroelectric capacitors is N, different (M, N-M) states corresponding to polarized sates of the N ferroelectric capacitors can be written in by designing a programming voltage, M is selectedfrom 0, 1, 2..., N, and the (M, N-M) states are read out by means of the transistor, thereby realizing multi-bit storage of the ferroelectric memory device.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a ferroelectric memory and an access method thereof. Background technique [0002] During the erasing and writing process of the memory based on the floating gate or charge trapping principle, the carriers need to tunnel through the gate dielectric under a high electric field (the gate voltage is greater than 5V), which poses challenges to the circuit design and limits the operation of the device. life. The ferroelectric memory device based on polarization inversion can avoid the above-mentioned related problems because it only needs a small erase and write voltage and does not involve a tunneling mechanism. [0003] Ferroelectric memory devices in the prior art mainly store "0" and "1" information through two different polarization states. Generally, only one byte can be stored based on one memory cell (that is, "0" and "1"). "1") information, increasing the storage cap...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11507G11C11/22H10B53/30
CPCG11C11/221H10B53/30
Inventor 朱正勇朱慧珑
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI