Method and device for implementing digital phase-locked demodulation filter
A digital phase-locking and filter technology, applied in digital technology network, transportation and packaging, automatic power control, etc., can solve the problem of being susceptible to noise and harmonic interference, affecting the accuracy or speed of demodulation, and anti-disturbance ability. To achieve the effect of low cost, high stability and high measurement accuracy
Active Publication Date: 2020-09-15
BEIJING JIAOTONG UNIV
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Problems solved by technology
After analyzing the existing design, the inventor finds that the low-pass filter design of the existing digital phase-locked demodulation has at least the following deficiencies: although the precision of demodulation using the IIR filter is very high, the speed of convergence is very slow, so that Affects the accuracy or speed of final demodulation; while using FIR filter is fast, but it is susceptible to noise and harmonic interference, and has poor anti-disturbance ability
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[0055] The embodiments of the present invention are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals indicate the same or similar elements or elements with the same or similar functions. The following embodiments described with reference to the accompanying drawings are exemplary, and are only used to explain the present invention, and cannot be construed as limiting the present invention.
[0056] Those skilled in the art can understand that, unless specifically stated otherwise, the singular forms "a", "an", "said" and "the" used herein may also include plural forms. It should be further understood that the term "comprising" used in the specification of the present invention refers to the presence of the described features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, Integers, steps, operations, el...
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The invention provides an implementation method of a digital phase locked demodulation filter and a device. The method includes: inputting digital signals respectively at two channels of the digital phase locked demodulation filter, multiplying the digital signal input at every moment in each channel respectively by a sine reference signal or cosine reference signal of the channel to obtain the frequency shift result of each channel, conducting accumulative averaging on the frequency shift result of a periodic point in each channel through a Kalman filter, and taking the calculated average value as an observed value of the channel at the moment; and utilizing the observed value of each channel at the moment to correct and update a predicted value of the channel at the moment by the Kalmanfilter, and then utilizing the updated predicted value of each channel to calculate the amplitude and phase of the digital signal. The improved design method of the digital phase locked demodulation filter provided by the invention not only guarantees high demodulation precision, but also guarantees demodulation rapidity, and has high stability.
Description
Technical field [0001] The invention relates to the technical field of digital phase-locked demodulation, in particular to a method and device for implementing a filter for digital phase-locked demodulation. Background technique [0002] In order to adapt to the online detection of high-speed rail defects, it is necessary to increase the speed of demodulation to quickly demodulate the high-frequency changing induced voltage. But in actual detection, the detection signal is often very weak and is interfered by the white noise in the analog circuit and the backflow of the rail traction. The accuracy of electromagnetic detection of defects is reduced by the influence of strong noise. Therefore, it is necessary to extract effective signals from the noise to improve the recognition ability of defects. [0003] Digital phase-locked demodulation is a way of phase-sensitive detection of alternating signals. The digital phase-locked demodulation method uses the reference signal with the s...
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IPC IPC(8): G01N27/82H03H17/02H03L7/085B61K9/08
CPCB61K9/08G01N27/82H03H17/02H03H2017/0205H03L7/085
Inventor 李勇刘泽
Owner BEIJING JIAOTONG UNIV