Dual protocol multiplexing chip and dual protocol multiplexing method

Abstract

The invention provides a dual protocol multiplexing chip and a dual protocol multiplexing method, and belongs to the technical field of network communication, wherein the dual protocol multiplexing chip comprises a first encoding module supporting a 16G Fiber Channel PCS protocol, a second encoding module supporting a 10.3125G Serial RapidIO PCS protocol, an encoding selection module respectivelyconnected to the first encoding module and the first second encoding module, a first decoding module supporting the 16G Fiber Channel PCS protocol, a second decoding module supporting the 10.3125G Serial RapidIO PCS protocol, and a decoding selection module respectively connected to the first decoding module and the second decoding module; and the encoding selection module is connected with a first enabling signal line, and the decoding selection module is connected with a second enabling signal line. According to the dual protocol multiplexing chip and the dual protocol multiplexing method provided by the embodiment of the present invention, transmission of the data packaged according to the 16G Fiber Channel PCS protocol and the 10.3125G Serial RapidIO PCS protocol is achieved in the same architecture, thereby saving a large amount of logic resources and reducing the cost of using the chip.

Description

technical field [0001] The invention relates to the technical field of network communication, in particular to a dual-protocol multiplexing chip and a dual-protocol multiplexing method. Background technique [0002] Fiber Channel counting is a backbone network technology that can provide high-speed data transmission for applications such as storage devices, IP data networks, and audio streaming. After years of development, it has now become a complete, high-speed, and highly scalable network technology. [0003] RapidIO (high-speed interconnection interface) technology is mainly oriented to the interconnection communication of high-performance embedded systems, and its transmission efficiency is higher than that of Ethernet. Moreover, due to the comprehensive consideration of RapidIO routing, switching, error tolerance and error correction, and ease of use, it can achieve high-performance and reliable data transmission based on hardware. [0004] Both Fiber Channel and Rap...

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Problems solved by technology

[0005] Aiming at the problems existing in the above-mentioned prior art, the present invention provides a dual-protocol multiplexing chip and a dual-protocol multiplexing method to alleviate the problems of waste of logic resources and high chip usage cost in the prior art

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