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A method and system for extending high-performance encryption and decryption computing capability

A computing capability and extension method technology, applied in the field of high-performance encryption and decryption computing capability extension methods and systems, can solve the problems of insufficient security protection capability, inability to effectively expand encryption and decryption computing performance, and low encryption and decryption computing capability of security chips.

Active Publication Date: 2019-01-11
网御安全技术(深圳)有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] That is to say, in the prior art, there is a problem that the encryption and decryption computing capability of the security chip itself is low, and the operating environment of the traditional security chip cannot effectively expand the encryption and decryption computing performance due to insufficient security protection capabilities.

Method used

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  • A method and system for extending high-performance encryption and decryption computing capability
  • A method and system for extending high-performance encryption and decryption computing capability
  • A method and system for extending high-performance encryption and decryption computing capability

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Embodiment Construction

[0040] In order to make the object, technical solution and advantages of the present invention more clear and definite, the present invention will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0041] The high-performance encryption and decryption computing ability expansion method described in the preferred embodiment of the present invention, such as figure 2 As shown, the method for extending the high-performance encryption and decryption computing capability includes the following steps:

[0042] Step S10, the main processor transmits the data to be encrypted and decrypted and the program call of the encryption and decryption operation to the FPGA main controller through the system communication, and the FPGA main controller receives and caches the relevant data.

[0043]...

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Abstract

The invention discloses a method and system for extending high-performance encryption and decryption computing capability. The method comprises the following steps: a main processor transmits data tobe encrypted and decrypted and program calls of encryption and decryption operations to an FPGA main controller through system communication; the FPGA master resolves the program calls from the main processor and decomposes them into a series of sub-processes. The FPGA master sends the corresponding command call and related data to the security chip. The security chip generates the secondary key required for the current encryption and decryption operation according to the root key stored in the FPGA master and the input data from the FPGA master, and feeds the operation result back to the FPGAmaster. According to the secondary key fed back by the security chip, the FPGA master calls the high-performance encryption and decryption circuit to complete the corresponding encryption and decryption operation, and sends the final operation result to the main processor. The invention adds a high-performance encryption and decryption circuit into the FPGA main controller to ensure the safe execution of the high-performance encryption and decryption operation.

Description

technical field [0001] The invention relates to the technical field of security chips, in particular to a high-performance encryption and decryption computing capability expansion method and system. Background technique [0002] A security chip refers to an integrated circuit chip that implements one or more cryptographic algorithms and uses cryptographic techniques directly or indirectly to protect keys and sensitive information. As the bottom-level security guarantee of smart terminals, the application of security chips can effectively prevent hacker attacks and cracks, improve the security of smart terminals, and protect users' personal information and application data security. At present, security chips are increasingly being used in smart terminals to provide reliable protection for financial payment and online identity authentication. The security chip is a trusted platform module. It is a device that can independently generate keys and encrypt and decrypt. It has an...

Claims

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Application Information

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IPC IPC(8): G06F21/62G06F15/78
CPCG06F15/7867G06F21/629
Inventor 罗禹铭罗禹城
Owner 网御安全技术(深圳)有限公司
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