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A high-speed gray complementary code generation system with adjustable rate based on fpga

A complementary code and rate technology, applied in the field of high-speed Gray complementary code generation control system, can solve the problems of low Gray complementary code rate and poor flexibility in code length adjustment, and achieve good stability.

Active Publication Date: 2022-03-22
TAIYUAN UNIV OF TECH
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Problems solved by technology

[0004] The purpose of the present invention is to provide a high-speed Gray complementary code generation control system based on FPGA with variable code length and adjustable rate, so as to solve the problems of low rate of existing Gray complementary code and poor flexibility of code length adjustment

Method used

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  • A high-speed gray complementary code generation system with adjustable rate based on fpga
  • A high-speed gray complementary code generation system with adjustable rate based on fpga
  • A high-speed gray complementary code generation system with adjustable rate based on fpga

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Embodiment Construction

[0020] The present invention will be described in detail below in conjunction with the embodiments and drawings, but the present invention is not limited thereto.

[0021] figure 1 It is a schematic diagram of the FPGA-based high-speed Gray complementary code generation system with variable code length and adjustable rate in the present invention. like figure 1 As shown, the embodiment of the present invention provides an FPGA-based high-speed Gray complementary code generation system with variable code length and adjustable rate, including a PC computer, an FPGA controller, a first memory, a second memory, and a differential signal sending module. The PC computer controls the FPGA controller to generate high-speed Gray's complementary codes, and simultaneously displays the generated high-speed Gray's complementary codes in real time; the FPGA controller writes a pair of high-speed Gray's complementary codes into the first memory and the second memory respectively, and then r...

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Abstract

The invention relates to an FPGA-based high-speed Gray complementary code generation system with variable code length and adjustable rate, including: a host computer, an FPGA controller, a first memory, a second memory, a differential signal sending module, and a host computer control The FPGA controller generates and displays high-speed Gray's complementary codes, and the FPGA controller writes the generated pair of high-speed Gray's complementary codes into the first memory and the second memory respectively, and then reads data from the first memory and the second memory, and Use the differential signal sending module to output it. Using this system can generate a code length of 2 n (n is a natural number), the rate is 615Mbps~3.125Gbps high-speed Gray complementary code with variable code length and adjustable rate.

Description

technical field [0001] The invention relates to an FPGA-based high-speed Gray complementary code generation control system with variable code length and adjustable rate. Generate code length 2 n (n is a natural number), gray complementary code signal with a rate of 615Mbps ~ 3.125Gbps. Background technique [0002] Pseudo-random coding signals have great application prospects in the field of radar detection due to their self-correlation characteristics similar to the shape of a pushpin, strong anti-noise performance, and low interception rate. There are many types of pseudo-random codes, and barker codes, m-sequence codes, gold sequence codes, and Gray's complementary codes are widely used. Although the Barker code has good autocorrelation characteristics, the code length is too short to obtain a greater pulse compression ratio, so it is difficult to apply directly. m-sequence codes, gold sequences, and Gray complementary codes all have good autocorrelation characteristic...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M7/16
CPCH03M7/16
Inventor 李静霞刘洋王冰洁徐航刘丽郭甜
Owner TAIYUAN UNIV OF TECH
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