3D memory device and manufacturing method thereof

Abstract

The invention discloses a 3D memory device and a manufacturing method thereof. The 3D memory device includes: a substrate; a first stacked structure stacked on the substrate, and a second stacked structure stacked on the first stacked structure, and a plurality of channel pillars passing through the first stacked structure and the second stacked structure, wherein channel laminations of the channel pillars are located on least a part of flat surface on an interface of the first stacked structure and the second stacked structure. The manufacturing method comprises: forming the first stacked structure on the substrate; forming a protective layer on the first stacked structure; forming a first pillar penetrating the protective layer and the first stacked structure; forming a second stacked structure on the protective layer; forming a second pillar penetrating the second layered structure; communicating the plurality of the first pillars and the plurality of the second pillars; removing the protective layer and forming the channel laminations.

Description

technical field [0001] The present invention relates to memory technology, and more particularly, to 3D memory devices and manufacturing methods thereof. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. [0003] Existing 3D memory devices are mainly used as non-volatile flash memory. The two main non-volatile flash memory technologies use NAND and NOR structures, respectively. Compared w...

AI Technical Summary

Problems solved by technology

For a stacked structure with a high number of layers, it is difficult to form channel pillars, so it is realized by stacking two or more stacked structures, but this will also cause the channel pillars of the upper and lower layers to be misaligned. Causes damage to the top layer structure of the lower channel hole at the layer-to-layer connection, which makes the 3D memory device fail

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