Decoding method, memory control circuit unit and memory storage device

A decoding method and control circuit technology, applied in the field of memory storage devices, can solve the problems of low number of error bits, reducing the success rate of encoded data, etc.

Active Publication Date: 2021-02-26
PHISON ELECTRONICS
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the optimum voltage for physically programming cells under reading, the optimum voltage for physically programming cells during reading, and the optimum voltage for physically programming cells during reading are usually not in the same read voltage group, so when using one of the multiple read voltage groups to read the data required for decoding, it may cause the number of error bits (or error rate) of the data read from a physical programming unit ) is low, and the number of error bits (or error rate) of the data read from other entity programming units is high, thereby reducing the success rate of decoding the encoded data generated by multi-frame encoding

Method used

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  • Decoding method, memory control circuit unit and memory storage device
  • Decoding method, memory control circuit unit and memory storage device
  • Decoding method, memory control circuit unit and memory storage device

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Embodiment Construction

[0111] Generally speaking, a memory storage device (also called a memory storage system) includes a rewritable non-volatile memory module (rewritable non-volatile memory module) and a controller (also called a control circuit). Typically memory storage devices are used with a host system such that the host system can write data to or read data from the memory storage device.

[0112] figure 1 It is a schematic diagram showing a host system, a memory storage device and an input / output (I / O) device according to an exemplary embodiment of the present invention. figure 2 It is a schematic diagram showing a host system, a memory storage device and an I / O device according to another exemplary embodiment of the present invention.

[0113] Please refer to figure 1 and figure 2 , the host system 11 generally includes a processor 111 , a random access memory (random access memory, RAM) 112 , a read only memory (read only memory, ROM) 113 and a data transmission interface 114 . The...

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Abstract

The invention provides a decoding method, a memory control circuit unit and a memory storage device. The method includes: when using the second voltage of the first read voltage group to read the first data from the first upper physical programming unit of the first physical programming unit group and the first error bit number of the first data is not greater than When the first error bit number threshold value, record this second voltage; when using the fourth voltage of the second reading voltage group to read the second data from the first lower physical programming unit of the second physical programming unit group and this When the second error bit number of the second data is not greater than the second error bit number threshold, record the fourth voltage; and generate a lookup table according to the second voltage and the fourth voltage, and perform a decoding operation according to the lookup table.

Description

technical field [0001] The invention relates to a decoding method, a memory control circuit unit and a memory storage device, in particular to a decoding method for generating and using a lookup table, a memory control circuit unit and a memory storage device. Background technique [0002] Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Since the rewritable non-volatile memory module (for example, flash memory) has the characteristics of data non-volatility, power saving, small size, and no mechanical structure, it is very suitable for being built in the various memory modules listed above. in portable multimedia devices. [0003] Generally speaking, in the process of decoding encoded data generated by multi-frame encoding to correct data error bits, a read voltage group is usually selected from a plurality of preset read voltage groups, and according to the set The select...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/08G11C8/10
CPCG11C8/10G11C16/08
Inventor 林纬许祐诚陈思玮杨宇翔
Owner PHISON ELECTRONICS
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