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Coding method of block interleaving quasi-cyclic extension parallel coded LDPC (Low Density Parity Check) codes and coder

A technology of LDPC code and block interleaving, which is applied in the direction of using block code for error correction/detection, error detection coding and coding using multiple parity bits, and can solve the problem of multiple error bits in error codewords and LDPC code coding efficiency No high-level problems, achieve high throughput and simple coding methods

Active Publication Date: 2012-03-28
ZTE CORP
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Problems solved by technology

[0031] In view of this, the main purpose of the present invention is to provide a kind of coding method and coder of the quasi-cyclic extension parallel coding LDPC code of block interleaving, to solve the coding efficiency of LDPC code is not high, and error code word under high signal-to-noise ratio The problem of many erroneous bits in

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  • Coding method of block interleaving quasi-cyclic extension parallel coded LDPC (Low Density Parity Check) codes and coder
  • Coding method of block interleaving quasi-cyclic extension parallel coded LDPC (Low Density Parity Check) codes and coder
  • Coding method of block interleaving quasi-cyclic extension parallel coded LDPC (Low Density Parity Check) codes and coder

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[0068] The sub-matrix corresponding to the information bit in the parity check matrix of the group interleaved quasi-cyclic extended parallel coding LDPC code proposed by the present invention is to expand the basic matrix by adopting a quasi-cyclic method, and then divide the extended matrix into blocks by rows and respectively It is obtained by performing row interleaving on each block row matrix, and the square matrix corresponding to the check digit in the check matrix is ​​a block diagonal matrix, and the block sub-matrix on its diagonal is a double diagonal matrix. The check bit of the LDPC code defined by the check matrix can be obtained through random interleaving single-bit accumulation coding, which reduces the coding complexity.

[0069] The check matrix of the group interleaved quasi-cyclic extended parallel coding LDPC code proposed by the present invention is divided into a sub-matrix corresponding to the information bit and a square matrix corresponding to the ch...

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Abstract

The invention discloses a coding method of block interleaving quasi-cyclic extension parallel coded LDPC (Low Density Parity Check) codes and a coder. The coding method comprises the steps of: dividing a check matrix of LDPC codes into a sub matrix corresponding to an information bit and a phalanx corresponding to a check bit; and coding the check bit of the LDPC codes by adopting a parallel random interleaving single-bit accumulative coding mode according to the check matrix. According to the invention, the coding mode of the block interleaving quasi-cyclic extension parallel coded LDPC codes is simple; the coding time and code length have a linear relationship; the throughput is high; under the condition of high signal to noise ratio, fewer error bits in error code words of the block interleaving quasi-cyclic extension parallel coded LDPC codes exist; and the LDPC codes can be used as inner codes of efficient serial concatenated codes.

Description

technical field [0001] The invention relates to the technical field of error control coding, in particular to a coding method and a coder of group-interleaved quasi-cyclic extension parallel coding LDPC codes. Background technique [0002] In modern digital signal transmission and storage systems, due to transmission channel noise or physical damage to storage media, digital signal transmission or storage errors are often caused. Therefore, in order to ensure the reliability of digital signal transmission or storage, error control coding technology is a standard technique. [0003] Low Density Parity Check (LDPC, Low Density Parity Check Code) code is an error control coding technique, and is a class of linear block codes defined on a sparse matrix H. H is the parity check matrix of the LDPC code, and for any legal codeword v, it satisfies the parity check equation H v T =0. In this way, the LDPC code can be encoded by using the parity check matrix. The decoding of LDPC ...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/11
CPCH03M13/611H03M13/116H03M13/6561H03M13/1197
Inventor 耿敏明陈为刚董同昕葛超
Owner ZTE CORP
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