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Encoding method and encoder for quasi-cyclically extended parallel encoding ldpc codes with group interleaving

A technology of LDPC code and block interleaving, which is applied in the direction of error correction/detection using block code, error detection coding and coding using multi-bit parity check bits, and can solve the problem of low coding efficiency of LDPC code and many error code words Error bits and other problems, to achieve the effect of simple encoding and high throughput

Active Publication Date: 2017-06-13
ZTE CORP
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Problems solved by technology

[0031] In view of this, the main purpose of the present invention is to provide a kind of coding method and coder of the quasi-cyclic extension parallel coding LDPC code of block interleaving, to solve the coding efficiency of LDPC code is not high, and error code word under high signal-to-noise ratio The problem of many erroneous bits in

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  • Encoding method and encoder for quasi-cyclically extended parallel encoding ldpc codes with group interleaving
  • Encoding method and encoder for quasi-cyclically extended parallel encoding ldpc codes with group interleaving
  • Encoding method and encoder for quasi-cyclically extended parallel encoding ldpc codes with group interleaving

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[0068] The sub-matrix corresponding to the information bit in the parity check matrix of the group interleaved quasi-cyclic extended parallel coding LDPC code proposed by the present invention is to expand the basic matrix by adopting a quasi-cyclic method, and then divide the extended matrix into blocks by rows and respectively It is obtained by performing row interleaving on each block row matrix, and the square matrix corresponding to the check digit in the check matrix is ​​a block diagonal matrix, and the block sub-matrix on its diagonal is a double diagonal matrix. The check bit of the LDPC code defined by the check matrix can be obtained through random interleaving single-bit accumulation coding, which reduces the coding complexity.

[0069] The check matrix of the group interleaved quasi-cyclic extended parallel coding LDPC code proposed by the present invention is divided into a sub-matrix corresponding to the information bit and a square matrix corresponding to the ch...

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Abstract

The invention discloses an encoding method and an encoder of a group-interleaved quasi-cyclic extended parallel encoding Low Density Parity Check (LDPC) code, comprising: the check matrix of the LDPC code is divided into a sub-matrix corresponding to information bits and a corresponding check matrix A square matrix of bits; according to the check matrix, the check bit of the LDPC code is encoded by using a parallel random interleaved single-bit accumulation coding method. In the present invention, the coding method of the quasi-cyclic extension parallel coding LDPC code interleaved in groups is simple, the coding time and the code length are in a linear relationship, and the throughput rate is high; The number of error bits in the code word is small, and it can be used as the inner code of the high-efficiency serial concatenated code.

Description

technical field [0001] The invention relates to the technical field of error control coding, in particular to a coding method and a coder of group-interleaved quasi-cyclic extension parallel coding LDPC codes. Background technique [0002] In modern digital signal transmission and storage systems, due to transmission channel noise or physical damage to storage media, digital signal transmission or storage errors are often caused. Therefore, in order to ensure the reliability of digital signal transmission or storage, error control coding technology is a standard technique. [0003] Low Density Parity Check (LDPC, Low Density Parity Check Code) code is an error control coding technique, and is a class of linear block codes defined on a sparse matrix H. H is the parity check matrix of the LDPC code, and for any legal codeword v, it satisfies the parity check equation H v T =0. In this way, the LDPC code can be encoded by using the parity check matrix. The decoding of LDPC ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/11
CPCH03M13/1197H03M13/116H03M13/611H03M13/6561
Inventor 耿敏明陈为刚董同昕葛超
Owner ZTE CORP
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