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Least significant bit dynamic element matching in digital-to-analog converter

A least significant bit, digital-to-analog converter technology, applied in the direction of digital-to-analog converter, analog-to-digital conversion, code conversion, etc.

Pending Publication Date: 2019-04-05
KEYSIGHT TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This technique may improve the noise floor, but results in better spurious-free dynamic range

Method used

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  • Least significant bit dynamic element matching in digital-to-analog converter
  • Least significant bit dynamic element matching in digital-to-analog converter
  • Least significant bit dynamic element matching in digital-to-analog converter

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Embodiment Construction

[0076] In the following detailed description, for purposes of explanation and not limitation, representative embodiments disclosing specific details are set forth in order to more fully understand embodiments in accordance with the present teachings. Descriptions of known systems, devices, materials, methods of operation, and methods of manufacture may be omitted so as not to obscure the description of representative embodiments. Nonetheless, systems, devices, materials, and methods within the purview of one of ordinary skill in the art are within the scope of the present teachings and may be used in accordance with representative embodiments. It is to be understood that the terminology used herein is for the purpose of describing embodiments only and is not intended to be limiting. The defined terms are in addition to the technical and scientific meanings of the defined terms as commonly understood and accepted in the technical field of the present teachings.

[0077] It wil...

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Abstract

A circuit (Fig. 1, Fig. 2, Fig. 3, Fig. 4) for digital-to-analog conversion includes a first digital-to-analog converter ((DAC) 105 / 205 / 305), a second DAC (206 / 306 / 406), and an output node (108 / 208 / 308 / 408). The first DAC (105 / 205 / 305) provides charges from multiple first charge sources segmented into a first group (125-127) for most significant bits of a digital input to the first DAC (105 / 205 / 305) and a second group (121-124) for least significant bits of the digital input. Dither (202 / 302) is both added to the digital input to the first DAC (105 / 205 / 305) and used as sole digital input to the second DAC (206 / 306 / 406). Analog output from the second DAC (206 / 306 / 406) is subtracted from analog output of the first DAC (105 / 205 / 305) at the output node so as to cancel the dither (202 / 302) added to the first DAC (105 / 205 / 305).

Description

Background technique [0001] Numeric input represents the code as a numeric input code. A digital-to-analog converter (DAC) converts a digital input to an analog output. The analog output is output as an analog output signal. For analog outputs, repetitive or periodic waveforms can be problematic due to periodicity (ie, due to being periodic). When an analog output is generated based on a digital input in a DAC, mismatch errors between DAC elements also become periodic. In the frequency domain, this periodic error can manifest itself as a smaller number of discrete spectral components or harmonics with higher power compared to aperiodic signals, which in turn tends to lead to reduced spurious-free dynamic range (SFDR ). [0002] Dither can be added to digital inputs to generate small amounts of random noise. For example, dither of a magnitude similar to or greater than the error can be added to the digital input before it enters the DAC. This has the effect of "randomizin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/66
CPCH03M1/662H03M1/066H03M1/68H03M1/745H03M1/0641
Inventor K·D·波尔顿R·E·朱厄特
Owner KEYSIGHT TECH