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Protection method for processor instruction cache single event flip soft error

A single-event flip, processor instruction technology, applied in the aerospace field, can solve problems such as program flow soft errors, processor application problems, and just in its infancy, achieving wide applicability and saving development costs.

Active Publication Date: 2022-05-27
SHANGHAI AEROSPACE COMP TECH INST
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, there is no hardened PPC750 processor corresponding to RAD750 in China at present, and the research on radiation resistance hardening of this high-speed processor is just in its infancy
As the main single-event-sensitive component of a high-performance processor, the single-event flip in the instruction cache will cause soft errors in the program flow, which will bring problems to the application of the processor in on-board computer products

Method used

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  • Protection method for processor instruction cache single event flip soft error

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Embodiment Construction

[0032] The present invention will be described in detail below with reference to specific embodiments. The following examples will help those skilled in the art to further understand the present invention, but do not limit the present invention in any form. It should be noted that, for those skilled in the art, several changes and improvements can be made without departing from the inventive concept. These all belong to the protection scope of the present invention.

[0033] In order to solve the problem of program soft errors caused by on-orbit single-event flipping in the application of high-performance processors in spaceborne computers, the present invention provides a protection method for processor instruction Cache single-event flipping soft faults. The technical solution of the present invention will be described in detail below with specific embodiments in conjunction with the high-performance processor PPC750 instruction Cache single-event flip soft error. It shoul...

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Abstract

The present invention provides a protection method for processor instruction Cache single event flipping soft errors. The method includes: determining the fault exception type caused by processor instruction Cache single event flipping; Error recovery function; according to the fault exception type, start the corresponding single event flipping soft error recovery function; through the single event flipping soft error recovery function, save the return address in the abnormal return address register of the processor, and invalidate the processor instruction cache The conversion operation; the address where the single event flip occurs is determined by the return address; the data corresponding to the address where the single event flip occurs is reacquired from the main memory, and the data restoration of the single event flip is performed. Therefore, the problem of program soft errors caused by single event flipping in the application of the processor in the on-board computer is solved, and it has the advantages of simple structure, low cost, high execution efficiency and wide applicability.

Description

technical field [0001] The invention relates to the field of aerospace technology, in particular, to a protection method for a single-event overturn soft error of a processor instruction Cache. Background technique [0002] With the development of spacecraft in the direction of long-life and high reliability, single-particle flips caused by galactic cosmic rays, solar cosmic rays, and high-energy charged particles in the Earth's radiation belt, especially heavy ions, have become a must for the reliable operation of spacecraft in orbit. a key factor of concern. Single event flipping is the effect of charged particle radiation on logic devices and logic circuits. When a single space high-energy charged particle bombards the chips of microelectronic devices in large-scale and ultra-large-scale integrated circuits, it will cause instantaneous logic errors or hard errors in logic devices or circuits, such as the data stored in memory cells. "0" or "0" is turned to "1"), resulti...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/16
CPCG06F11/165G06F11/1683
Inventor 孙逸帆游红俊田文波刘骁白亮
Owner SHANGHAI AEROSPACE COMP TECH INST
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