Unlock instant, AI-driven research and patent intelligence for your innovation.

A kind of array substrate and its manufacturing method

A manufacturing method and technology for array substrates, which are used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of high risk of open circuit or abnormal impedance, large number of masks, and high cost, and improve product yield. , the effect of reducing the number of masks

Active Publication Date: 2021-07-23
NANJING BOE DISPLAY TECH CO LTD
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0017] 1. The source-drain metal and the gate metal in the terminal area need to be bridged by ITO to conduct, and the risk of open circuit or abnormal impedance is high;
[0018] 2. The back channel will be affected by oxidizing ions such as F in the etching gas used in dry etching or the etching solution used in wet etching, resulting in poor TFT characteristics;
[0019] 3. The array substrate manufacturing process of FFS mode requires a large number of masks;
[0020] 4. An additional organic insulating film is required, and the cost is high

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A kind of array substrate and its manufacturing method
  • A kind of array substrate and its manufacturing method
  • A kind of array substrate and its manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0075] image 3 shown in Figure 2f Schematic flow chart of a manufacturing method of a 6-channel mask array substrate for FFS display on the basis of , the manufacturing method includes the following subsequent steps:

[0076] S7-1: cover the first transparent conductive layer 08 on the basis of the above S6, and then cover the second metal layer 05 on the first transparent conductive layer 08;

[0077] S8-1 (3 rd mask): pattern the second metal layer 05 to form a source-drain metal layer in the pixel area and a part of the second metal layer 05 in the terminal area; the source-drain metal layer in the pixel area and the metal layer below it The first transparent conductive layer 08 is in direct contact, and the first transparent conductive layer 08 is in direct contact with the semiconductor layer below it;

[0078] S9-1 (4 th mask): pattern the first transparent conductive layer 08 to expose the semiconductor layer in the channel region, and connect the first transpar...

Embodiment 2

[0084] Figure 5a~5f shown in Figure 2f On the basis of the schematic diagram of the manufacturing method of the 5-channel mask array substrate used for FFS display, the manufacturing method includes the following subsequent steps:

[0085] S7-2 (3 rd mask): such as Figure 5a As shown, the first transparent conductive layer 08 is covered on the basis of the above S6, and then the second metal layer 05 is covered on the first transparent conductive layer 08; the second photoresist 20 is coated on the second metal layer 05, The gray-scale mask exposes and develops the second photoresist 20, so that the second photoresist 20 forms a second photoresist-free region 202 located above the channel region and two photoresist-free regions 202 in the pixel region. The second thick photoresist region 201 on the side, the second thin photoresist region 203 located above the non-thin film transistor region (ie, the region in the pixel region except the semiconductor layer and the chan...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses an array substrate and a manufacturing method thereof, and relates to the technical field of liquid crystal display. The manufacturing method of the array substrate exposes and develops the first photoresist through a multi-grayscale mask on the active layer, so that the first photoresist forming a first thick photoresist region above the gate, a first non-photoresist region above the terminal gate, and a first thin photoresist region between the first thick photoresist region and the first non-photoresist region; Etching away the active layer and gate insulating layer in the first photoresist-free region to form a terminal contact hole above the terminal gate; ashing the first photoresist and then etching to form a semiconductor layer above the gate ; Make the second metal layer of the source-drain metal can be directly connected to the terminal gate through the terminal contact hole, and at the same time reduce the number of photomasks through the structure that the pixel electrode is arranged under the source-drain metal layer, avoiding bridging through other conductive layers adverse risks.

Description

technical field [0001] The present invention relates to the technical field of liquid crystal display, and in particular, to an array substrate and a manufacturing method thereof. Background technique [0002] Multi-tone mask (MTM) is often used in the array substrate manufacturing process in the display industry to reduce the number of masks and reduce costs. The traditional multi-step exposure technology is mainly used to realize the patterning of the semiconductor layer and the source-drain metal layer through one-time exposure and multiple etching. The main process flow is as follows: figure 1 shown. The process sequence is: [0003] S1: gate metal film formation and patterning; [0004] S2: gate insulating layer, semiconductor layer, source and drain metal film formation; [0005] S3: Multi-level exposure using a multi-gray mask; [0006] S4: non-channel region semiconductor layer, source and drain metal patterning; [0007] S5: photoresist ashing thinning; [00...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/84H01L27/12
Inventor 戴超王志军
Owner NANJING BOE DISPLAY TECH CO LTD