114 results about "Thick photoresist" patented technology

Photoresist compositions and methods suitable for depositing a very thick photoresist layer in a single coating process are provided. Such photoresist layers are particularly suitable for use in chip scale packaging.

A method of forming a top gate thin film transistor (TFT). By performing photolithography using a first reticle, a photoresist layer having a thick photoresist layer portion and a thin photoresist layer portion is formed on a silicon layer in an active area. Thus, a channel layer and source/drain regions in a silicon island are defined by the same patterning process. In addition, a gate and an LDD region in the silicon island are defined by photolithography using a second reticle and a backside exposure process. Accordingly, the top gate TFT fabrication process of the present invention requires only two reticles, and thereby reduces costs.

The invention relates to a manufacturing method of a nanoscale super resolution optical focusing device, which comprises the following steps that S1 an operating wavelength of incident light is selected, a euphotic substrate is selected, a metal film is evaporated and coated on a surface, and the incident light is perpendicular to the upper surface of the metal film; S2 materials of the metal film and a dielectric film are selected in accordance with the operating wavelength, and fresnel wavezone radii at all levels are designed; S3 the position of a groove band, i.e. the radius of an inner ring, is selected; S4 the width and the depth of the groove band are modulated in accordance with the requirement of the intensity of focal spots; S5 the orientation of the groove band is selected in accordance with a polarization state of the incident light; S6 a processing technique is utilized to obtain metal masks of fresnel wavezone annular gaps and grooves; S7 nanometer-thick metal and dielectric multilayer film structures are alternately evaporated and coated on back surfaces of the metal masks, and the total thickness of a multilayer film is deposited as a focal length of a lens; and S8 a layer of nanometer-thick photoresist and a layer of reflecting metal layer are evaporated and coated on the multilayer film structures, and then the nanoscale super resolution optical focusing device is obtained.

A fully CMOS compatible MEMS multi-project wafer process comprises coating a layer of thick photoresist on a wafer surface, patterning the photoresist to define a micromachining region, and performing a micromachining in the micromachining region to form suspended microstructures.

The invention discloses a low etching resist cleaning fluid suitable for cleaning of thicker photoresists. The low etching resist photoresist cleaning fluid comprises (a) a quaternary ammonium hydroxide, (b) an alkylol amine, (c) a sugar or a sugar alcohol, (d) a surfactant, and (e) a solvent. The low etching resist photoresist cleaning fluid is capable of removing the photoresists on semiconductor wafers with high efficiency; no attack on base materials, such as aluminium and copper, is caused; and the low etching resist photoresist cleaning fluid processing a promising application prospect in the field of semiconductor wafer cleaning.

The invention discloses a low-etching cleaning agent which is suitable for cleaning photoresist which is much thicker, which is characterized in that the invention comprises caustic potash, dimethyl sulfoxide, benzoic alcohol, and aminoethyl alcohol. The cleaning agent of the invention can be used for removing photo resist (light blockage) or other residues on metals, metal alloy, or dielectric substrate, which is especially suitable for cleaning the photoresist which is much thicker (the thickness is more than 100 mm), meanwhile, the invention has a lower etching speed for metals such as copper and the like. The invention has a good application prospect in the microelectron field such as the cleaning of semiconductor crystal and the like.

A method for allowing an easier electric connection between layers of a multi-layer package structure using a metal pin fabricated based on semiconductor device processes is provided. A metal pin having a high aspect ratio is formed on a lower substrate, while a via hole is formed in an upper substrate. The metal pin is inserted into the via hole and adhered together to make an electric connection between the lower and upper substrates. The metal pin is obtained by patterning a thick photoresist material and plating a material thereon. The metal pin may have a core member obtained by performing a plating process on the surface of a patterned polymer based pin. Solder or gold is used for adhesion and electric connection between the signal line and the metal pin. The above electric connection method can be simpler and have improved structural stability compared with the typical connection method.

Disclosed is a patterned photoresist layer on a passivation layer, formed by a lithography process with a multi-tone photomask, having a non-photoresist region, a thin photoresist pattern, and a thick photoresist pattern. The passivation layer corresponding to the non-photoresist region is removed, thereby forming vias to expose a part of a drain electrode in a TFT and a part of a top electrode in a storage capacitor, respectively. The thin photoresist pattern is then ashed to expose the passivation layer in a pixel region. Thereafter, a conductive layer is selectively deposited on the exposed passivation layer and on the sidewalls/bottoms of the vias. Subsequently, the remaining thick photoresist pattern is ashed.

The invention discloses a cleaning agent suitable for cleaning thick photoresist and with low etching performance, which contains (a) potassium hydroxide, (b) dissolvent, (c) pentaerythritol, (d) alkylol amine and (e) phloroglucinol. The cleaning agent for the photoresist can also be used for removing the photoresist and other residues on metal, metal alloy or dielectric medium substrates, has low etch rate on metal including copper (Cu) and the like simultaneously, and has good application prospect in microelectronics fields including semiconductor chip cleaning and the like.

A liquid crystal display device includes a substrate, liquid crystal disposed on the substrate, and a protrusion to influence on the alignment of the molecules of the liquid crystal to increase a viewing angle. The protrusion includes portions with different sizes, depending on the desired control power of the protrusion on the alignment of the molecules. That is, the portion size increases in the area where more control power is desired, and the portion size decreases in the area where less control power is desired. The protrusion is formed by depositing and pattering a thick photoresist. At the same time, a spacer can be formed.

A method for fabricating a multi-level micro-fluidic device for an micro-fluidic injection head equipped with symmetrical heaters. The method incorporates two thick photoresist deposition processes, a light-absorbing layer deposited in-between and a nickel-containing material electroplating process. The first thick photoresist deposition process is carried out to form a primary ink chamber in fluid communication with a funnel-shaped manifold and an injector orifice. The light-absorbing layer is deposited to prevent overheating of the first photoresist layer during a subsequent metal seed layer sputtering process. The second thick photoresist deposition process forms a mold for forming an injector passageway that leads to the injector orifice. The nickel-containing material electroplating process provides an orifice plate on top of the injection head through which an injector passageway that leads to the injector orifice is provided for injecting ink droplets.

The invention relates to an indium welded ball array preparing method based on an electroplating technology, which is characterized in that primary thin photoresist lithography is carried out before a seed layer is manufactured, then the seed layer is manufactured, thick positive photoresist is coated at places where indium needs to be deposited to photoetch a mold and form a thin photoresist/seed layer/thick photoresist structure, an indium column with required height is deposited in the mold by an electroplating method, the seed layer is stripped by ultrasound, and finally indium salient point backflow is realized in an annealing furnace with a controllable temperature so as to obtain an indium welded ball array. The invention provides a novel seed layer removing technology by which high-quality indium welded balls with small distance, small size and large array are prepared successfully.

The present invention belongs to the field of chemical fiber producing technology, and is spinning jet capillary bore machining method based on photoetching. Mask is first made based on the shape ofspinning capillary bores, homogeneous thick photoresist layer is then formed on conducting substrate, and through further ultraviolet exposure and electroforming the metal structure is obtained, withthe photoresist in spinning capillary pores being finally eliminated. The said technological process can machine spinning board with complicated pores and pores in different shapes, and the technological process has high flexibility, high identity, high precision and low cost and is suitable for mass production. The present invention provides one new method for machining spinning jet capillary pores.

A method for forming a shallow well of a semiconductor device using low-energy ion implantation is described. A well region is formed to the depth of a trench isolation layer using a low-energy, high-dose ion implantation process. The method for forming a well using low-energy ion implantation can minimize well margin reduction caused by impurity spread and well margin reduction caused by shrinkage of a thick photoresist pattern.

The present invention provides a novel silicon carbide small-angle inclined mesa terminal structure applicable to the terminal structure of SiC large-scale high-voltage devices and a preparation method thereof. Such high-voltage devices include SiC GTO, SiC PiN and other small-angle inclined mesa terminal structures. SiC device; the etching technology of the present invention uses AZ4620 thick photoresist as a mask mode and realizes uniform reflow of photoresist in a large area. The bottom angle can be between 0°~20°. According to different etching depths of different types of devices, the etching technology can be used to form a single inclined mesa etching terminal structure or multiple use to form a multi-level inclined mesa etching terminal structure. Compared with other multi-mesa terminal etching schemes, the process of the present invention is significantly simplified, and because the scheme is an ideal slope, its suppression effect on device edge field intensity concentration is theoretically better than other similar schemes.

The invention provides a production method of a thin film transistor. The method comprises the following steps of sequentially depositing a semiconductor layer and a metal layer; coating a photoresist layer on the metal layer; exposing the photoresist layer, patterning the photoresist layer, wherein one part of the photoresist layer is formed into a thin photoresist layer, and the other part is formed into the thick photoresist layer or non-photoresist layer; etching primarily: etching the metal layer and the semiconductor layer to remove the part covered by the non-photoresist layer; graying the photoresist layer, and removing the thin photoresist layer to expose the metal layer positioned under the thin photoresist layer; etching secondarily: etching the metal layer to form a source, a drain and a channel area and expose the semiconductor layer positioned in the channel area; and removing the photoresist layer. According to the production method provided by the invention, one time of utilization of a photomask is reduced, production cost of the thin film transistor is reduced, and a technological process is optimized.

The invention discloses a low-etching cleaning solution suitable for cleaning relatively thick photoresist. The low-etching photoresist cleaning solution contains potassium hydroxide, solvent, alkylol amine, organic phenol, benzoic acid and derivative thereof or salt thereof, and polycarboxylate corrosion inhibitor. The photoresist cleaning solution can be used for removing the photoresist or other residues on metal, metal alloy or dielectric substrate, has relatively low etching rate on the metals such as copper, aluminum, tin, lead and silver, and has good application prospect in the micro-electronics field such as semiconductor chip cleaning.

The invention discloses a method for improving photoresist morphology through repetitive exposure. According to the method, problem that in a thick photoresist lithography technology, a morphology having an undercut structure is difficulty realized on the sidewall of the photoresist can be solved, and the method has the advantages of low cost and strong enforcement performance. The method comprises the following steps: coating a first photoresist and pre-baking the first photoresist, wherein the first photoresist only sensitizes to light of a first wavelength; coating a second photoresist and pre-baking the first photoresist, wherein the second photoresist only sensitizes the light of a second wavelength, and the second wavelength is different from the first wavelength; exposuring the first photoresist by using light of the first wavelength; exposuring the second photoresist by using light of the second wavelength; and developing the exposure first photoresist and the second photoresist, wherein, the exposure condition is set, so that the size of the developed first photoresist is smaller than the size of the second photoresist.

The invention provides a manufacturing method of a large-power vertical light-emitting diode, relating to the technical field of a semiconductor photoelectric device. The manufacturing method disclosed by the invention comprises the following steps of: 1) generating an epitaxial wafer on a sapphire substrate; 2) evaporating a reflection metal layer on a P-type GaN-based semiconductor layer; 3) forming a current stopping layer on an N-electrode area and forming a protection type passivation layer on the side wall of a groove; 4) forming an isolation groove; 5) filling photoresist I into the isolation groove; 6) depositing a diffusion impervious layer on the surface of the device, electrically plating a seeding layer, etching to expose the diffusion impervious layer, and coating thick photoresist II; 7) forming a metal supporting layer above the device; 8) stripping the sapphire substrate from the device and cleaning; 9) roughening the surface and evaporating an N-type electrode; 10) cutting the device to from core particles; and 11) grinding and polishing the surface of the sapphire substrate. According to the manufacturing method disclosed by the invention, the stability of an LED (Light-Emitting Diode) in a vertical structure can be improved and the yield of the finished core particles is improved.

A plurality of sequential electro-deposition, planarization and insulator deposition steps are performed over a patterned thick photoresist film to form a laminated ferromagnetic alloy core for micro-fabricated inductors and transformers. The use of a plurality of contiguous thin laminations within deep patterns on non-removable photoresist film provides sufficient volume of magnetic film in, for example, high frequency applications, and reduces eddy current loss at high frequency.

A fabrication method of three-dimensional microstructures is to fabricate a real 3D microstructure. First, a substrate is coated with an anti-reflection layer to absorb reflected exposure light, and then the anti-reflection layer is overlaid with a first thick photoresist. After having been fully exposed by a first photo mask, a predetermined exposure depth of the first thick photoresist is achieved by a second photo mask and dosage-controlled UV exposure. If the unexposed areas of the first thick photoresist are released during a development step, a single-layer microstructure is created. Inversely, a multi-layered microstructure can be obtained simply by repeating the process described above. After all layers are laminated on the substrate, all unexposed areas of the all thick photoresist layers are released and connected to each other during a development step.

The invention discloses a method for preparing a convex graphical substrate used for the epitaxial growth of nitrides, namely, a self-aligned process for preparing the convex graphical substrate. The method comprises the following steps of: carbonizing a plurality of convex graphical microstructures which are made of thin photoresist and arranged on a sapphire substrate by high-temperature processing; coating a thick photoresist layer on the carbonized microstructures, and carrying out self-aligned exposure on the thick photoresist layer by using the carbonized convex graphical microstructures as a masking film; and fusing the carbonized convex graphical microstructures and the developed photoresist graphs to convex round balls by using high temperature hardening, and finally transferring the graphical structure to the substrate by using the dry etching technology so as to obtain the convex graphical substrate. By adopting the self-aligned process of the invention, the problem that the convex graph made of thick photoresist is easy to drop can be solved, a high-precision exposure requirement can be met by using a common exposure machine, and the uniformity of the graph can be greatly improved, so that the process for preparing the convex graphical substrate can realize industrialization.