Battery protection chip packaging structure
A chip packaging and chip protection technology, applied in circuits, electrical components, electrical solid devices, etc., can solve the problems of large packaging area, inability to take into account the miniaturization of packaging and low packaging internal resistance, and achieve low packaging internal resistance and packaging area. Minimization, low package miniaturization effect
Inactive Publication Date: 2019-05-28
BYD SEMICON CO LTD
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Problems solved by technology
[0006] The first solution can achieve a smaller package internal resistance than the second solution, but the package area of the first solution is larger than the second
Obviously, the existing solutions cannot take into account the two requirements of package miniaturization and low package internal resistance
Method used
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Embodiment Construction
[0028] Embodiments of the invention are described in detail below, examples of which are illustrated in the accompanying drawings. The embodiments described below by referring to the figures are exemplary and are intended to explain the present invention and should not be construed as limiting the present invention.
[0029] Such as image 3 As shown, Embodiment 1 of the present invention provides a battery protection chip packaging structure, including: a chip package 360, the chip package encapsulates one or more small-size chips 340; a large-size chip 350, the large-size chip On the chip package 360, a stacked structure is formed; a metal block 370, one end of which is embedded in the chip package 360, is connected to the chip package, and the other end protrudes from the upper surface 361 of the chip package, and is connected to the chip package. The lower surface 351 of the large-sized chip is electrically connected. The chip package 360 includes packaging glue 362 an...
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The invention provides a battery protection chip packaging structure comprising a chip packaging body, a large-size chip and a metal block, wherein the chip packaging body packages one or more small-size chips; the large-size chip is arranged on the chip packaging body to form a stacked structure; and one end of the metal block is embedded into the chip packaging body and is electrically connectedwith the chip packaging body, and the other end of the metal block protrudes out of the upper surface of the chip packaging body and is electrically connected with the lower surface of the large-sizechip. According to the technical scheme provided by the invention, the electrical port of the upper-layer large-size chip in the packaging structure is led out to the lower part of the chip through the metal block, so that the packaging area of the whole packaging structure is basically consistent with that of the upper-layer chip, and the packaging area is minimized; the cross section area of the metal block is larger than that of a lead in the prior art, so that the cross section area through which a conduction current passes reaches the maximum size limited by a chip, and the minimum packaging internal resistance is realized. According to the technical scheme of the invention, two requirements of packaging miniaturization and low packaging internal resistance are simultaneously considered.
Description
technical field [0001] The invention relates to the technical field of chip packaging, in particular to a battery protection chip packaging structure. Background technique [0002] Long working hours and fast charging are trends in portable consumer electronics such as mobile phones and tablets. Long-term work requires a larger battery capacity, and fast charging of a large-capacity battery will cause the battery protection chip to withstand a large current impact, which requires the MOSFET that functions as a current switch to have a lower internal resistance. In addition, portable products such as mobile phones have become thinner, larger display screens and larger batteries have left less space and area for other electronic components including chips, which requires chip packaging to be more compact. Short and thin miniaturization direction. [0003] At present, there are two options for battery protection chip packaging used in lithium battery protection in the market ...
Claims
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IPC IPC(8): H01L23/49
CPCH01L2224/73265H01L2224/48247H01L2224/32245H01L2224/48137H01L2924/00
Inventor 吴彦
Owner BYD SEMICON CO LTD