Lateral Diffused Metal Oxide Semiconductor Field Effect Transistor

Abstract

The present invention provides a laterally diffused metal oxide semiconductor field effect transistor comprising: a body region, located in a substrate, having a first conductivity type; a drift region, located in the substrate, having a second conductivity type opposite to the first conductivity type; a source The electrode region is located in the body region and has the second conductivity type; the drain region is located in the drift region and has the second conductivity type; the isolation region is located in the drift region between the source region and the drain region; the gate, Located above the body region and the drift region; the source field plate is electrically connected to the source region; the drain field plate is electrically connected to the drain region; and the first gate plate is electrically connected to the gate, wherein the first gate plate corresponds to It is arranged above the grid, and the shapes of the first grid plate and the grid are substantially the same in plan view. The invention can reduce the grid resistance without increasing the extra metal winding area, and make the elements uniformly conduct, shorten the closing time of the switch, and reduce the switching loss.

Description

technical field [0001] The invention relates to a semiconductor technology, in particular to a lateral diffusion metal oxide semiconductor field effect transistor. Background technique [0002] High-voltage semiconductor components are suitable for high-voltage and high-power integrated circuits. Conventional high voltage semiconductor devices include lateral diffused metal oxide semiconductor (LDMOS) transistors. The advantage of high-voltage semiconductor components is that they are easily compatible with other manufacturing processes and cost-effective, so they are widely used in power supplies, power management, display driver IC components, communications, automotive electronics, industrial control and other fields. [0003] Traditionally, a metal silicide layer (poly silicide) is formed on polysilicon to reduce the resistance of the gate, which can meet the general application of high-voltage semiconductor device circuits. However, when a high-voltage semiconductor e...

AI Technical Summary

Problems solved by technology

However, multiple gate contacts require additional metal routing area, increasing the size of high-voltage semiconductor components

In addition, additional gate contacts can only be provided around the device, but cannot be provided inside the device, which limits the uniformity of device conduction

[0005] In summary, although the existing LDMOS field effect transistors generally meet the requirements, they are not satisfactory in all aspects, especially the gate resistance of LDMOS field effect transistors still needs to be further improved

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