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A 429 bus receiving node large-tolerance sampling circuit

A technology of receiving nodes and sampling circuits, applied in the field of large-tolerance sampling circuits of 429 bus receiving nodes, can solve problems such as clock deviation and sampling data errors, and achieve the effect of accurate data transmission

Active Publication Date: 2019-06-04
西安翔腾微电子科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention: to provide a 429 bus receiving node large-tolerance sampling circuit, to solve the technical problem of sampling data errors in the prior art due to the deviation of the clocks of the sending node and the receiving node

Method used

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  • A 429 bus receiving node large-tolerance sampling circuit
  • A 429 bus receiving node large-tolerance sampling circuit
  • A 429 bus receiving node large-tolerance sampling circuit

Examples

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Embodiment 2

[0019] Embodiment 2: Exclusive OR gate module, synchronizer module, receiving sampled data module, data cache FIFO module are the same as Example 1, and the sampling point calculation module sampling timer is implemented. From the effective beginning of receiving the input "rx" signal, each clock The cycle timer increases by "1", and when the count value of the counter is equal to N / 2, the sampling instruction signal "rx_en" is output at this moment.

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Abstract

The invention relates to a sampling circuit, in particular to a 429 bus receiving node large-tolerance sampling circuit, and solves the technical problem of sampling data errors caused by the fact that clocks of a sending node and a receiving node have deviation in the prior art. The intermediate time of each data bit received from a 429 bus is taken as a data sampling point, and the synchronizedto-be-sampled data is sampled according to the sampling point.

Description

technical field [0001] The invention relates to a sampling circuit, in particular to a large-tolerance sampling circuit of a 429 bus receiving node. Background technique [0002] As a serial data bus in the aviation field, the 429 bus has the advantages of simple structure, stable performance, and strong anti-interference. In practical applications, due to the deviation of the clocks of the sending node and the receiving node, the baud rate cannot reach the ideal value. If the receiving node calculates the sampling point to sample data according to the fixed sampling point clock of the node, it will lead to sampling errors. Contents of the invention [0003] The purpose of the present invention is to provide a large-tolerance sampling circuit for a receiving node of a 429 bus to solve the technical problem of sampling data errors in the prior art due to clock deviations between the sending node and the receiving node. [0004] Technical solution of the present invention: ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L15/24
Inventor 牛少平田泽王宣明韩一鹏刘承禹王世中
Owner 西安翔腾微电子科技有限公司
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