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A signal processing method and device

A signal processing device and signal processing technology, applied in the computer field, can solve the problem of not being able to fully utilize the performance of the processor, and achieve the effect of good utilization and power consumption reduction

Active Publication Date: 2021-01-29
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The embodiment of the present application provides a signal processing method, which is used to solve the technical problem in the prior art that the operation sequence obtained only according to the hit rate of the cache may not be able to fully utilize the performance of the processor

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  • A signal processing method and device
  • A signal processing method and device
  • A signal processing method and device

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example 1

[0117] Example 1, see Figure 9a , block signal matrix A to obtain 2×2 (X=2, H=2) fractal signal matrices, and block weight matrix B to obtain 2×2 (H=2, Y=2) fractal weight matrices. In this case, calculating the matrix C requires 8 (2×2×2) matrix multiplication operations, that is, 4 fractal signal matrices and 4 fractal weight matrices constitute 8 matrix multiplications.

example 2

[0118] Example 2, see Figure 9b , block signal matrix A to obtain 3×2 (X=3, H=2) fractal signal matrices, and block weight matrix B to obtain 2×3 (H=2, Y=3) fractal weight matrices. In this case, calculating the matrix C requires 18 (3×2×3) matrix multiplication operations, that is, 6 fractal signal matrices and 6 fractal weight matrices constitute 18 matrix multiplications.

[0119] Step 803: Obtain the operation sequence of the X×H×Y matrix multiplications, and process the X×H×Y matrix multiplications according to the operation sequences of the X×H×Y matrix multiplications to obtain X ×Y result matrices, wherein any result matrix in the X×Y result matrices is obtained by accumulating operation results of at least two matrix multiplications in the X×H×Y matrix multiplications.

[0120] Here, the operation sequence of the X×H×Y matrix multiplications is used to instruct the MAC unit to calculate the sequence of the X×H×Y matrix multiplications, which can be in various repres...

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Abstract

The application discloses a signal processing method and device. The method includes: obtaining X×H fractal signal matrices by dividing the signal matrix into blocks, obtaining H×Y fractal weight matrices by dividing the weight matrix into blocks; obtaining an operation sequence of X×H×Y matrix multiplication, and performing X×H×Y Matrix multiplication is processed to obtain X×Y result matrices; the operation sequence of X×H×Y matrix multiplication is obtained according to performance parameters, and the performance parameters include reading X×H fractal signal matrices from the first buffer The power consumption of any fractal signal matrix, the power consumption of reading any fractal weight matrix in H×Y fractal weight matrices from the second buffer and reading X×H×Y matrices from the third buffer The power consumption of the operation result of any matrix multiplication in the multiplication. The embodiment of the present application determines the operation sequence according to the above three kinds of power consumption, which can more effectively reduce the power consumption of the processor.

Description

technical field [0001] The embodiments of the present application relate to the technical field of computers, and in particular to a signal method and device. Background technique [0002] Neural Network (NN) is a network structure that imitates the behavioral characteristics of animal neural networks for information processing. The structure is composed of a large number of nodes (or called neurons) connected to each other, and based on a specific computing model, the purpose of processing information is achieved by learning and training input information. A neural network includes an input layer, a hidden layer and an output layer. The input layer is responsible for receiving input signals, the output layer is responsible for outputting the calculation results of the neural network, and the hidden layer is responsible for learning, training and other calculation processes. It is the memory unit of the network, and the memory of the hidden layer Functions are represented b...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06N3/04G06N3/063G06V10/764
CPCG06N3/063G06N3/045G06F17/16G06N3/08G06V40/172G06V10/454G06V10/82G06V10/764G06N3/04
Inventor 许若圣
Owner HUAWEI TECH CO LTD