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Data writing method, valid data identification method and memory storage device

A technology for data writing and storage devices, applied in electrical digital data processing, instruments, etc., can solve problems such as reduced writing efficiency, inability to achieve simultaneous or parallel writing in the first area and the second area, etc.

Active Publication Date: 2019-07-12
PHISON ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

That is to say, when writing to the first area and the second area of ​​the same memory sub-module, the memory controller needs to wait for the rewritable non-volatile memory module to write data into the first area before sending the command Sequence to write to the second area, but this method cannot achieve simultaneous or parallel writing of the first area and the second area, resulting in a decrease in writing efficiency

Method used

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  • Data writing method, valid data identification method and memory storage device
  • Data writing method, valid data identification method and memory storage device
  • Data writing method, valid data identification method and memory storage device

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Embodiment Construction

[0100] Generally speaking, a memory storage device (also called a memory storage system) includes a rewritable non-volatile memory module and a controller (also called a control circuit unit). Typically memory storage devices are used with a host system such that the host system can write data to or read data from the memory storage device.

[0101] figure 1 is a schematic diagram of a host system, a memory storage device, and an input / output (I / O) device according to an exemplary embodiment, and figure 2 It is a schematic diagram showing a host system, a memory storage device and an input / output (I / O) device according to another exemplary embodiment.

[0102] Please refer to figure 1 and figure 2 , the host system 11 generally includes a processor 111 , a random access memory (random access memory, RAM) 112 , a read only memory (read only memory, ROM) 113 and a data transmission interface 114 . The processor 111 , random access memory 112 , ROM 113 and data transmission...

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Abstract

The invention provides a data writing method, a valid data identification method and a memory storage device. The method comprises the following steps: receiving first data; writing first sub-data inthe first data into a first entity programming unit of at least one first memory sub-module in the plurality of memory sub-modules by using a first programming mode, wherein the size of each first sub-data in the first sub-data is the same as a preset size; and a second entity programming unit that writes the remaining sub-data in the first data to a second memory sub-module of the plurality of memory sub-modules using a second programming mode, wherein the size of the remaining sub-data is smaller than a preset size, and the second memory sub-module is different from the last third memory sub-module used for writing the first sub-data in the first memory sub-module.

Description

technical field [0001] The invention relates to a data writing method, a valid data identification method and a memory storage device. Background technique [0002] Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Since the rewritable non-volatile memory module (for example, flash memory) has the characteristics of data non-volatility, power saving, small size, and no mechanical structure, it is very suitable for being built in the various memory modules listed above. in portable multimedia devices. [0003] According to the number of bits that can be stored in each storage unit, NAND-type flash memory modules can be divided into single-level storage unit (single level cell, SLC) NAND-type flash memory modules, multi-level storage unit (muiti level cell, MLC) NAND type flash memory module and complex number level storage unit (trinary level cell, TLC) NAND type flash memory...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/16
CPCG06F13/1668
Inventor 林松尧郭岳甫萧宇民
Owner PHISON ELECTRONICS