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Semiconductor storage device and operation method thereof

A technology of storage device and operation method, applied in information storage, measurement device, static memory, etc., to achieve the effect of ensuring accuracy

Active Publication Date: 2019-07-19
WINBOND ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] The present invention solves such conventional problems, and an object thereof is to provide a semiconductor memory device capable of accurately reading setting information from a memory cell array when the power is turned on.

Method used

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  • Semiconductor storage device and operation method thereof
  • Semiconductor storage device and operation method thereof
  • Semiconductor storage device and operation method thereof

Examples

Experimental program
Comparison scheme
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Embodiment

[0054] The configuration of the main part of the flash memory of the embodiment of the present invention is shown in figure 2 . However, the configuration of the flash memory shown here is an example, and the present invention is not necessarily limited to this configuration.

[0055] The flash memory 100 of the present embodiment includes the following structures: a memory cell array 110, wherein a plurality of memory cells are arranged in a matrix; an input-output buffer 120, connected to an external input-output terminal I / O; an address register (address register) 130 , receive address data from the I / O buffer 120; the controller 140 receives command (command) data from the I / O buffer 120 to control each part; the word line selection circuit 150 receives the row address information Ax from the address register 130, The address information Ax is decoded (decode), and based on the decoding result, block selection and word line selection, etc. are performed; the page buffer / ...

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Abstract

A semiconductor memory device and an operation method thereof that can accurately read setting information from a memory cell array when a power supply is turned on are provided. The flash memory (100) includes a memory cell array (110), a detecting portion, a ROM and a control portion. The detecting portion detects that the power supply is turned on. The ROM stores at least a code for performinga reading operation of the memory cell array and stores a special code in a specific address. The control portion controls the reading of the ROM. When the detecting portion detects the power-on of the power supply, the control portion reads the special code from the ROM and determines whether the read special code is correct or not, reads the code if the determination is correct and again reads the special code if the determination is incorrect.

Description

technical field [0001] The present invention relates to a semiconductor storage device such as a flash memory, and more particularly to a power-on operation when a power supply is turned on. Background technique [0002] A NAND type flash memory uses fuse cells to store information such as voltage settings for reading, programming, and erasing, and user option settings. The fuse unit is, for example, disposed in a memory area in the memory cell array that cannot be accessed by a user. The flash memory reads the setting information stored in the fuse unit as a power-up operation when the power is turned on, and loads it into a configuration register or the like. After the charging operation, the controller reads the setting information held in the configuration register and controls each operation. [0003] For example, Patent Document 1 discloses a nonvolatile memory that determines whether or not data read from a fuse unit for pre-check coincides with predetermined data f...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/26G11C16/16G11C17/16G11C17/18
CPCG11C16/26G11C16/16G11C17/16G11C17/18G11C2029/0407G11C5/143G11C7/20G11C16/20G11C16/0483G11C17/143G01R19/16552G11C16/30G06F12/0246G11C29/04
Inventor 须藤直昭
Owner WINBOND ELECTRONICS CORP