Multi-chip series automatic address coding system and method

An address coding and multi-chip technology, which is applied in the field of multi-chip serial automatic address coding system, can solve the problems of large number of IOs, unfixable coding address and physical location, inconvenience, etc., achieve high communication efficiency, solve communication delay, and facilitate The effect of repair and replacement

Inactive Publication Date: 2019-08-02
深圳市致宸信息科技有限公司
View PDF10 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] In the prior art, there are three address coding methods. The first one is to directly use IO in the chip to set the chip address, which is suitable for multi-chip serial communication mode 1 and multi-chip serial communication mode 2. The disadvantage is that when the number of chips is too large, it takes up The number of IOs is large, and it is inconvenient to add upper and lower resistors when designing the circuit board; the second

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Multi-chip series automatic address coding system and method
  • Multi-chip series automatic address coding system and method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0033] figure 1 It is a block diagram of a multi-chip serial automatic address coding system module in Embodiment 1 of the present invention, referring to figure 1 , a multi-chip series automatic address coding system, including a main control device and N chips, the main control device is connected to the first chip, from the first chip to the Nth chip, the sending end TX of the chip is connected to the next chip The receiver RX connection of the chip.

[0034] Wherein, the master control device is used to send an automatic address allocation command to the first chip; the automatic address allocation command includes an ID.

[0035] The chip is used to receive the automatic address allocation instruction, decode the automatic address allocation instruction, obtain the ID, set the ID as the chip ID, and perform the operation on the ID according to the operation rules, obtain the automatic allocation address instruction for the operation, and automatically assign the address ...

Embodiment 2

[0043] figure 2 It is a schematic flow chart of the multi-chip serial automatic address coding method in Embodiment 2 of the present invention, referring to figure 2 , a multi-chip series automatic address coding method, comprising:

[0044] In the first sending step, the master control device sends an automatic address allocation instruction to the chip;

[0045] Among them, the automatic address assignment instruction includes ID;

[0046] Receive the decoding step, the chip receives the automatic address allocation command, decodes the automatic address allocation command, and obtains the ID;

[0047] In the setting step, the chip sets the ID as the chip ID;

[0048] In the operation step, the chip performs the operation on the ID according to the operation rules, and obtains the operation automatic allocation address instruction;

[0049] Among them, the operation rule is increment operation;

[0050] In the second sending step, the chip sends the operation automatic ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a multi-chip series automatic address coding system and method, and the system comprises a main control device and N chips, the main control device is connected with a first chip, and the sending end of each chip is connected with the receiving end of the next chip from the first chip to the Nth chip; the main control device is used for sending an automatic address distribution instruction to the first chip; wherein the automatic address distribution instruction comprises an ID; and each chip is used for receiving the automatic address allocation instruction, decoding the automatic address allocation instruction to obtain the ID, setting the ID as a chip ID, carrying out operation on the ID according to an operation rule to obtain an operation automatic address allocation instruction, and sending the operation automatic address allocation instruction to the next chip. The communication efficiency is high; through automatic address coding, a chip address does notneed to be set by occupying an IO port of the chip, the chip address can be redistributed at any time when the chip is replaced, maintenance and replacement of the chip are facilitated, and use is more convenient. The invention relates to the technical field of communication.

Description

technical field [0001] The invention relates to the field of communication technology, in particular to a multi-chip serial automatic address coding system and method. Background technique [0002] In current applications that require large-scale parallel computing or large-scale parallel control, dozens or even hundreds of identical chips are generally required to work at the same time. Control the working status of the chip. At present, there are two multi-chip serial communication methods. The first method is that after each chip receives the signal, it parses the data according to the protocol and forwards the data to the next chip. When the number of serial chips is large, the subsequent chip receives the data delay. Long; the second method is that each chip is directly connected to the next chip before parsing the data, and then each chip parses the data by itself. [0003] In the prior art, there are three address coding methods. The first one is to directly use IO ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F15/173G06F15/78
CPCG06F15/17306G06F15/7867
Inventor 黄安民刘志赟
Owner 深圳市致宸信息科技有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products