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Low-power time-to-digital converter

A time-to-digital converter technology, which is used in time-to-digital converters, electrical unknown time interval measurement, devices for measuring time intervals, etc. Effect

Active Publication Date: 2019-08-27
FUDAN UNIV
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  • Application Information

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Problems solved by technology

However, the results obtained by the charging and discharging of resistors and capacitors are not completely linear. Therefore, the input range of the

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[0033] Hereinafter, the present invention will be more fully described in reference embodiments in conjunction with the drawings. The present invention provides preferred embodiments, but should not be considered as limited to the embodiments set forth herein.

[0034] The present invention provides a low-power time-to-digital converter, which is figure 1 The circuit architecture shown includes a pre-amp (Pre-amp) and a successive approximation register analog-to-digital converter (SARADC); the input signal is input into the pre-amplifier in the form of pseudo-differential for amplification, and then by successive approximation The register type analog-to-digital converter converts into a digital signal. Among them, the design principle of the pre-amplifier is to obtain the phase difference between the two input clock signals, and the phase difference is input into the inverter in the form of a pulse and converted into a voltage before amplifying. The analog-to-digital converter ...

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Abstract

The invention relates to a low-power time-to-digital converter. The low-power time-to-digital converter comprises a pre-amplifier and a successive approximation register type analog-digital converter;signals in a pseudo-differential form are input to the pre-amplifier; through a phase frequency detector of the pre-amplifier, a phase inverter, a passive amplifier composed of an N-type MOS capacitor, and a source follower, the input time-domain signals are converted into voltage signals, and the voltage signals are amplified; and finally, the voltage signals are input to the successive approximation register type analog-to-digital converter to be converted into digital signals. The passive amplifier composed of the N-type MOS capacitor is used, so that the precision of the time-to-digital converter can be improved. The phase inverter is turned off after the input signals are sampled, and the source follower is turned off in a restoration state; and two mechanisms can be used for avoiding unnecessary power consumption for the low-power time-to-digital converter so as to achieve the purpose of low power consumption.

Description

technical field [0001] The invention belongs to integrated circuit technology, in particular to a time-to-digital converter with low power consumption. Background technique [0002] Phase-locked loops are already indispensable for many current chips, so how to further improve the performance of phase-locked loops is still one of the hot researches. The time-to-digital converter architecture used in [1] is similar to a two-step time-to-digital converter, which mainly consists of two time-to-digital converters with different precisions. [0003] The operating principle of a typical two-step time-to-digital converter is to first input the input signal to a low-precision time-to-digital converter to obtain a digital signal, and then use a digital-to-time converter to restore the obtained digital signal to a time signal and then compare it with the reference clock signal Subtract and amplify, and then input the result to a high-precision time-to-digital converter for the second ...

Claims

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Application Information

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IPC IPC(8): G04F10/00
CPCG04F10/005
Inventor 叶大蔚徐荣金屠于婷史传进
Owner FUDAN UNIV
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