TSV-based multi-chip package structure and method for fabricating same

Abstract

The present invention relates to the field of chip packaging and in particular to a TSV-based multi-chip package structure and a method for fabricating the same. The multi-chip package structure comprises an interconnection structure; a first chip disposed on the interconnection structure; an adapter plate disposed on the interconnection structure at the same side as well as the first chip, and having a thickness greater than that of the first chip; a second chip disposed on the adapter plate and opposite to the interconnection structure; and a packaging layer. By means of the interconnectionstructure and the adapter plate which has a certain thickness and on which the second chip is mounted, the first chip and the second chip can be located on two planes at different heights, thereby realizing the three-dimensional package of the multiple chips. Compared with the prior art, the package structure provided by the present invention has the size sum of the first chip and the second chipno longer limited by the plan view size of the interconnection structure, thereby expanding the diversified development of the chip packaging structure.

Description

technical field [0001] The invention relates to the field of chip packaging, in particular to a TSV-based multi-chip packaging structure and a preparation method thereof. Background technique [0002] With the development of electronic products in the direction of miniaturization, high performance, and high reliability, the system integration level is also increasing. The 2.5D / 3D integration technology with Through Silicon Via (TSV) as the core has been widely considered to be the future The leading technology in the field of high-density packaging. Compared with traditional 2D packaging, TSV-based 2.5D packaging enables multiple chips to be directly interconnected on the adapter board, which greatly shortens the length of the wiring and reduces signal delay and loss. [0003] The current TSV-based packaging structure usually sets the TSV array directly on a silicon substrate, and at the same time performs wiring on the upper and lower surfaces of the silicon substrate to fo...

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Problems solved by technology

[0005] Therefore, the technical problem to be solved by the present invention is to overcome the multi-chip packaging structure in the prior art. Due to the limitation of the size of the interconnection layer, the sum of the sizes of the chips integrated on the TSV adapter board needs to be smaller than that of the TSV adapter board. The size of the chip, which leads to the limitation of the size selection of the chip, is not conducive to the diversified development of chip packaging, thereby providing a TSV-based multi-chip packaging structure and its preparation method

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