pcie DMA interactive system and interactive method based on fpga

Abstract

The invention relates to a PCIE DMA interaction system and interaction method based on an FPGA, and belongs to the technical field of DMA. A new scheme is adopted, the existing CPU polling register (R2) mode is improved, PCIE multi-channel DMA interaction between an FPGA board card and a CPU is achieved, occupation of CPU resources and PCIE bandwidth is effectively reduced, and PCIE transmission efficiency is improved.

Description

technical field [0001] The invention belongs to the technical field of DMA, and in particular relates to an FPGA-based PCIE DMA interactive system and an interactive method. Background technique [0002] DMA reading and writing is a common method for data transmission between the FPGA board and the CPU. How the CPU starts DMA, and how the FPGA board ends the DMA after the PCIE transfer is completed affects the DMA transfer efficiency. key technologies. [0003] The commonly used DMA interaction method is that the CPU writes the DAM enable register (R1) of a certain BAR space address to start DMA, and the FPGA board controls PCIE to transmit data. After the transmission is completed, the FPGA updates another register (R2) of the BAR space address. , the CPU polls the register (R2) to end DMA and complete a DMA operation, such as figure 1 shown. During PCIE data transmission, the CPU has been polling the register R2 on the FPGA board, occupying CPU resources and PCIE bandwi...

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved in the present invention is: how to solve the problem of CPU resource and PCIE bandwidth occupied by CPU constantly polling the register of FPGA board in the PCIE transmission process

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