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FPGA-based neural network acceleration method and accelerator

A neural network and accelerator technology, applied in the field of neural network, can solve problems such as high computational complexity, inability to meet CNN acceleration, insufficient cost and power consumption, etc., to achieve the effect of improving computing efficiency and reducing off-chip storage access

Pending Publication Date: 2020-02-28
TIANJIN UNIV
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Problems solved by technology

Compared with traditional algorithms, the computational complexity of CNN is much higher, and the general-purpose CPU can no longer meet the computational requirements. At present, the main solution is to use GPU for CNN calculation. Although GPU has natural advantages in parallel computing, it is There are great deficiencies in cost and power consumption, which cannot satisfy CNN acceleration in some low-specific scenarios

Method used

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  • FPGA-based neural network acceleration method and accelerator
  • FPGA-based neural network acceleration method and accelerator
  • FPGA-based neural network acceleration method and accelerator

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Embodiment Construction

[0024] The present invention designs a FPGA-based convolutional neural network accelerator. The invention includes a convolution operation module, a pooling module, a DMA module, an instruction control module, an address control module, an internal RAM module and an instruction RAM module. The design proposed in this paper realizes parallel calculation in the convolution operation, and a single clock cycle can complete 512 times of multiplying and accumulating. The on-chip storage structure is designed to reduce off-chip storage access while realizing effective data multiplexing. The pipeline technology is used to realize the complete convolutional neural network single-layer operation process and improve the operation efficiency.

[0025] The following solutions are provided:

[0026] Including convolution operation module, pooling module, DMA module, instruction control module, address control module, internal RAM module and instruction RAM module.

[0027] The convolution...

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Abstract

The invention belongs to the technical field of neural networks, and provides an FPGA-based convolutional neural network accelerator, which considers the requirements of the neural network acceleratoron performance and universality and has a wide application scene. Therefore, according to the accelerator, the neural network accelerator based on the FPGA comprises a convolution operation module, apooling module, a direct memory access DMA module, an instruction control module, an address control module, an internal random access memory RAM module and an instruction RAM module. Wherein the convolution operation module is used for carrying out operation on a convolution layer in the convolutional neural network. The method is mainly applied to design and manufacturing of neural network chips.

Description

technical field [0001] The invention belongs to the technical field of neural networks, in particular to a neural network accelerator architecture based on a field programmable gate array (FPGA) Background technique [0002] With the rapid development of artificial intelligence, Convolutional Neutral Network (CNN) has attracted more and more attention, and it plays an important role in many fields such as image processing. Compared with traditional algorithms, the computational complexity of CNN is much higher, and the general-purpose CPU can no longer meet the computational requirements. At present, the main solution is to use GPU for CNN calculation. Although GPU has natural advantages in parallel computing, it is There are great deficiencies in terms of cost and power consumption, which cannot meet the acceleration of CNN in some low-specific scenarios. FPGA has powerful parallel processing capability, flexible configurable features and ultra-low power consumption, which...

Claims

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Application Information

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IPC IPC(8): G06N3/063G06N3/04
CPCG06N3/063G06N3/045Y02D10/00
Inventor 秦国轩李炳剑
Owner TIANJIN UNIV
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