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System and method for realizing accessing operation by adopting configurable on-chip storage device

A technology of a storage device and a configuration method, which is applied in the directions of memory system, memory address/allocation/relocation, program control design, etc., can solve problems such as off-chip memory access delay and inability to map content to on-chip, so as to improve performance and reduce The time to wait for data and the effect of strong computing power

Active Publication Date: 2010-12-29
INST OF COMPUTING TECH CHINESE ACAD OF SCI
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  • Application Information

AI Technical Summary

Problems solved by technology

However, the single use of Cache can cache all the content in the memory, but it will inevitably be replaced, which still brings delays in off-chip memory access.
However, only programmer-controlled on-chip storage cannot map more content to on-chip, and more often requires off-chip memory access

Method used

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  • System and method for realizing accessing operation by adopting configurable on-chip storage device

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Embodiment Construction

[0044] In order to make the purpose, technical solution and advantages of the present invention clearer, the system and method of the present invention using a configurable on-chip storage device to implement memory access operations will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0045] The system and method for implementing memory access operations using a configurable on-chip storage device of the present invention provides a configuration method for multiple modes of on-chip storage in view of the computing characteristics of the application program. By default, the memory is used as a Cache. The programmer is transparent; if the application program will generate a large number of intermediate calculation results, and these results will be used as the source data fo...

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Abstract

The invention discloses a system and a method for realizing accessing operation by adopting a configurable on-chip storage device. The method for configuring the configurable on-chip storage device comprises the following steps of: judging whether to configure the on-chip storage device or not according to the calculation characteristic of an application program, if so, executing the step 020, and otherwise, configuring the on-chip storage device never, and using the on-chip storage device as Cache; and judging whether the requirement of the space size of SPM or the Cache is strict or not, ifso, configuring fine grit, namely configuring the on-chip storage device by using a cache line as a unit, and otherwise, configuring coarse grit, namely configuring the on-chip storage device by using a way as a unit, wherein each way corresponds to a zone bit, if the zone bit is 1, the on-chip storage device is the SPM, and if the zone bit is 0, the on-chip storage device is the Cache.

Description

technical field [0001] The invention relates to the field of processor design, in particular to a system and a method for implementing a memory access operation by using a configurable on-chip storage device. Background technique [0002] The advancement of manufacturing technology, the driver of application software, and the power consumption and heat dissipation of single-core processors have all prompted the emergence of multi-core processors. However, it has not solved one of the key problems affecting the performance of traditional processors - the memory wall. (Memory Wall) problem. That is, the speed of the processor increases by 60% every year, while the memory access delay only improves by 7% every year, resulting in a growing gap between the computing speed of the processor and the access speed of the memory. Therefore, a more efficient storage structure organization is very important for the design of the processor. [0003] The introduction of the Cache structu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/34G06F12/02
Inventor 范灵俊林伟张浩范东睿
Owner INST OF COMPUTING TECH CHINESE ACAD OF SCI
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