Methods of Wafer Alignment During Photolithography
A lithography and wafer technology, applied in the semiconductor field, can solve the problem of graphics deviation from the wafer, so as to achieve the effect of improving yield and reducing the probability of deviation
Active Publication Date: 2022-07-12
LATTICE POWER (JIANGXI) CORP
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[0004] In order to overcome the above deficiencies, the present invention provides a method for aligning wafers in the photolithography process, which effectively solves the problem that the graphics may deviate from the wafer in the existing production process
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[0017] In order to more clearly describe the embodiments of the present invention or the technical solutions in the prior art, the specific embodiments of the present invention will be described below with reference to the accompanying drawings. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative efforts, and obtain other implementations.
[0018] We know that in the chip manufacturing process, the marking points produced by the first lithography are generally aligned and exposed, and the relative position of the substrate to be lithography and the lithography plate during the first lithography is determined by the initial alignment coordinate value. The deviation of the alignment coordinate value will lead to the dislocation of the substrate to be lithography and the lithography plate during the firs...
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Abstract
The invention provides a method for aligning wafers in a lithography process, comprising: preparing a lithography unit composed of a plurality of substrates to be lithography; placing the first substrate to be lithography in the lithography unit on a lithography plate Within the range enclosed by the surface alignment marks, the alignment marks include at least 3 marking points distributed on a circumference, and the size of the circumference matches the size of the wafer; The alignment operation between the two is to update the alignment coordinate value; perform the first photolithography process on the first substrate to be photoetched; take out the first substrate to be photoetched, and sequentially align the photolithography unit according to the updated alignment coordinate value Photolithography is performed on other substrates to be photoetched. In the process of lithography in units of lithography units, manually align the first substrate to be lithography, place it in the range enclosed by the alignment marks, and align the alignment coordinates according to the alignment operation. The value is manually corrected, which greatly reduces the probability of deviation of the lithography pattern and improves the yield.
Description
technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for wafer alignment in a photolithography process. Background technique [0002] The manufacture of semiconductor devices needs to go through hundreds of processes. As the main process step of patterning, photolithography plays an important role in the manufacturing process of semiconductor devices. With the increasingly complex structure of semiconductor devices and more and more photolithography processes, in order to ensure the fabrication yield of semiconductor devices, mutual alignment between photolithography patterns is particularly important. [0003] At present, in the contact / proximity lithography process of semiconductors and LEDs, the edge wrapping process is almost always used, that is, no pattern is made within a few millimeters of the wafer edge; and several lithography processes in the chip manufacturing process are generally used. Marked dots mad...
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IPC IPC(8): G03F9/00
CPCG03F9/7073
Inventor 黄涛
Owner LATTICE POWER (JIANGXI) CORP