Method and device for realizing deep neural network on field programmable gate array

A deep neural network and gate array technology, applied in biological neural network models, neural architecture, physical implementation, etc., can solve problems such as the difficulty of deep neural network acceleration, slow calculation speed of deep neural network, etc., and achieve a large total throughput , Improve resource utilization and meet performance requirements

Pending Publication Date: 2020-04-17
HANGZHOU WEIMING XINKE TECH CO LTD +1
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It is common to implement deep neural networks on FPGA, but the calculation speed of FPGA-based deep neural networks is rela

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  • Method and device for realizing deep neural network on field programmable gate array
  • Method and device for realizing deep neural network on field programmable gate array
  • Method and device for realizing deep neural network on field programmable gate array

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[0034] In order to make the purpose, technical solutions, and advantages of the present application clearer, the following further describes the present application with reference to the drawings and specific embodiments. It should be understood that the specific embodiments described here are only used to explain the application, and not used to limit the application. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of this application.

[0035] Those skilled in the art can understand that, unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meaning as those commonly understood by those of ordinary skill in the art to which this application belongs. It should also be understood that terms such as those defined in a general dictionary should be understood as having a meaning consistent with the meaning ...

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Abstract

The invention discloses a method and a device for realizing a deep neural network on a field-programmable gate array. The method comprises the following steps: analyzing resource demand and saturationthroughput of each network layer of the deep neural network; enumerating all division schemes for dividing all the network layers into a plurality of programmable logic gate arrays according to the resource demand and the saturation throughput; calculating effect parameter data of all the division schemes, and selecting an optimal scheme from all the division schemes; and implementing the optimalscheme on a board. The invention provides a method for realizing a deep neural network on a field programmable gate array. According to the method, the optimal division scheme of dividing the networklayer of the deep neural network into the plurality of FPGAs is planned, so that the resource utilization rate of the FPGAs and the computing power of the deep neural network are greatly improved, FPGA resources can be saved, the relatively large total throughput can be achieved, and the performance requirements of the deep neural network can be well met.

Description

technical field [0001] This application relates to the field of computer technology, in particular to a method and device for implementing a deep neural network on a field programmable gate array. Background technique [0002] Field Programmable Gate Array (Field Programmable Gate Array), referred to as FPGA, is a product developed on the basis of programmable devices such as PAL, GAL, and CPLD. It appeared as a semi-custom circuit in the field of application-specific integrated circuits, which not only solved the shortcomings of custom circuits, but also overcome the shortcomings of the limited number of original programmable device gates. Deep Neural Networks (DNN for short) is an artificial neural network with multiple hidden layers. DNN is widely used in artificial intelligence fields such as image processing and pattern recognition. It is common to implement deep neural networks on FPGA, but the computing speed of FPGA-based deep neural networks is relatively slow. M...

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Application Information

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IPC IPC(8): G06N3/04G06N3/063
CPCG06N3/063G06N3/045
Inventor 罗国杰戴拓张文泰章嘉玺
Owner HANGZHOU WEIMING XINKE TECH CO LTD
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