Storage method based on graph storage structure

Abstract

A storage method based on a graph storage structure provided by the present invention belongs to the field of storage structures and includes an adjacency matrix capable of m-level segmentation; the adjacency matrix with the smallest granularity after segmentation is an adjacency matrix of n*n, and the adjacency matrix is ​​the first 0-layer adjacency matrix, establish row and column indexes for the non-zero elements of the 0th-layer adjacency matrix according to the row number and column number; the i+1-th layer adjacency matrix is ​​continuously divided on the basis of the i-layer Each element in the adjacency matrix of the +1 layer includes multiple consecutive elements of the i-th layer adjacency matrix, and the i+1-th layer adjacency matrix is ​​an adjacency matrix of j*j, and the i+1-th layer is adjacency according to the row number and column number The non-zero elements of the matrix respectively establish row and column indexes; where, n>1, m>1, m‑2≥i, n>j, j≥1. The storage method based on the graph storage structure provided by the present invention, on the basis of multi-level node segmentation, adds accurate multi-level segmentation block row and column indexes, which is beneficial to improve the efficiency of memory access under different granularities.

Description

technical field [0001] The invention relates to a storage method, in particular to a storage method based on a graph storage structure. Background technique [0002] In scientific computing using unstructured grids, the relationship of data can be abstracted into a graph topology, which is generally represented by a sparse adjacency matrix. In the existing storage structure, the adjacency matrix mostly adopts a row-first storage method, such as the compressed row format CSR (Compressed Sparse Row). In numerical calculations, adjacency matrices with symmetric non-zero elements are also common, and such matrices can also only store the upper or lower triangular matrix row and column indices to represent the complete topological relationship. [0003] Non-Uniform Memory Access (NUMA for short) is the mainstream memory architecture adopted by modern multiprocessor computers, and its memory access time depends on the location of the memory relative to the processor. Therefore, ...

AI Technical Summary

Problems solved by technology

However, these sorting and partitioning methods cannot satisfy the precise data access of different granularities in parallel under the NUMA architecture.

Images