Photonics integrated circuit package

Abstract

An integrated circuit package integrates a photonic die (oDie) and an electronic die (eDie). More specifically, the integrated circuit package may include a plurality of redistribution layers communicatively coupled to at least one of the oDie and / or the eDie, where molded material at least partially surrounds the at least one of the oDie and / or the eDie.

Description

Technical field [0001] The embodiment of the present invention relates to an integrated circuit package and a manufacturing method thereof. Background technique [0002] Conventional packaging techniques generally involve dividing the wafer and then packaging the individual dies on the diced wafer. Since the individual dies are packaged after the wafer has been diced, the package size tends to be significantly larger than the die size. In contrast, in standard wafer-level packaging technology, the integrated circuit is packaged while parts of the wafer are brought to rest, and then the wafer is cut. Therefore, the resulting package is usually the same size as the die itself. However, since the number of external contacts that can be accommodated in the limited footprint of the package is limited, there are advantages and disadvantages of smaller packages. In some cases, this can become a significant limitation when considering complex semiconductor devices that require a large...

AI Technical Summary

Problems solved by technology

However, the advantages of a smaller package come with a downside due to the limited number of external contacts that can be accommodated in the limited package footprint

In some cases this can become a significant limitation when considering complex semiconductor devices requiring a large number of contacts

Images