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Low-frequency clock duty ratio calibration circuit, calibration method and memory

A low-frequency clock and calibration circuit technology, applied in the field of integrated circuits, can solve the problems of long calibration time and degradation of calibration quality, and achieve the effects of high accuracy, guaranteed clock quality, and low cost

Pending Publication Date: 2020-05-15
CHANGXIN MEMORY TECH INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The purpose of the present invention is to provide a low-frequency clock duty cycle calibration circuit and memory to solve the problems of long calibration time and decreased calibration quality at low frequencies

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  • Low-frequency clock duty ratio calibration circuit, calibration method and memory
  • Low-frequency clock duty ratio calibration circuit, calibration method and memory
  • Low-frequency clock duty ratio calibration circuit, calibration method and memory

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Embodiment Construction

[0050]Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus their detailed descriptions will be omitted.

[0051] In the related art, the traditional clock duty ratio calibration circuit includes: a signal adjustment circuit and a duty ratio detection unit, the signal adjustment circuit is used to receive the first clock signal of the memory and adjust it to the second clock signal, so that the duty ratio Maintain within the ideal range; the duty ratio detection unit is used to detect the duty ratio of the second clock signal, and t...

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Abstract

The invention provides a low-frequency clock duty ratio calibration circuit, a calibration method and a memory. Setting codes, reflecting the low-frequency working frequency of the memory, in a mode register setting circuit of the memory are converted into output signals through a decoding circuit, and the capacitance value of a duty ratio detection circuit is adjusted through the output signals,so that the detection requirements are met, and the clock duty ratio calibration quality is improved. The clock duty ratio can be calibrated in time for the current clock frequency during low-frequency work, the calibration accuracy is high, the calibration speed is high, and the clock quality of the memory is ensured; and a memory mode self-contained circuit is utilized, the structure is simple,and the cost is low.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a low-frequency clock duty ratio calibration circuit and memory, and also relates to a low-frequency clock duty ratio calibration method. Background technique [0002] In the DRAM, a duty cycle of 50% can maximize the utilization efficiency of the clock level, thereby ensuring the normal operation of the system and the best performance. However, in actual work, the duty cycle of the clock circuit often deviates from 50%, and the clock duty cycle calibration circuit is a kind of circuit designed for this problem. [0003] The existing clock duty ratio calibration circuit compares the charging and discharging time of the capacitor with the electric quantity. Because the memory may work at a lower operating frequency, the capacitance has been fixed during design. When the clock frequency changes, the lower clock frequency will have a longer charge and discharge time, an...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/4076G11C29/02
CPCG11C11/4076G11C29/028
Inventor 刘格言
Owner CHANGXIN MEMORY TECH INC