Impedance calibration circuit and calibration control method for physical interface of computer flash memory device
A computer flash memory and impedance calibration technology, which is applied in the field of integrated circuits, can solve the problems of difficult reduction of power consumption of impedance calibration circuits and low impedance of the drive end, and achieve the effects of improving power consumption performance, reducing system power consumption, and improving process compatibility
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[0055] The following will clearly and completely describe the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.
[0056] As mentioned in the background, in existing interface circuits, it is difficult to reduce the power consumption of the impedance calibration circuit. In addition, the ONFi standard stipulates that the reference voltage VREF of the DDR interface is 1 / 2 Vccq, but in many advanced technologies, the reference voltage VREF of 1 / 2 Vccq is close to the transistor threshold of the drive circuit, so that the comparison circuit in the impedance calibration circuit is at the ref...
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