Ethernet Data Stream Recording Method for High Speed ​​Data Acquisition System

Abstract

The invention belongs to the fields of high-speed data acquisition and network data processing, and in particular relates to an Ethernet data stream recording method, system and device for a high-speed data acquisition system, and aims to solve the problem of low CPU utilization and poor system compatibility in the existing high-speed data acquisition system. , packaging and deployment difficulties, and low reliability of system transmission. The system method includes: after the Linux operating system is started, isolating a set number of CPU cores; uninstalling the operating system kernel mode network card driver, creating a huge page memory pool, and allocating the corresponding data receiving buffer pool and non-volatile network card to each 10G network card Lock the FIFO buffer and initialize the PCIE registers of each 10G network card to make it enter the acquisition state; continuously receive and record the data packets collected by each 10G network card in the user-mode polling driving mode. The invention improves CPU utilization, system compatibility and transmission reliability, and reduces the difficulty of packaging and deployment.

Description

technical field [0001] The invention belongs to the fields of high-speed data acquisition and network data processing, and in particular relates to an Ethernet data stream recording method, system and device for a high-speed data acquisition system. Background technique [0002] With the development of science and technology, a variety of applications have put forward higher storage bandwidth requirements for data acquisition systems, such as radar signal processing, radio astronomy detection, and high frame rate video recording. The high-speed data acquisition system is mainly composed of high-speed analog-to-digital converter (ADC), real-time digital signal processor and storage device, etc. The data transmission bandwidth can generally reach more than 500MB / s. The real-time digital signal processor of the high-speed data acquisition system generally takes FPGA or DSP chip as the control core, and directly stores the digital signal after analog-to-digital conversion in the...

AI Technical Summary

Problems solved by technology

[0005] In order to solve the above-mentioned problems in the prior art, that is, in order to solve the existing Ethernet-based high-speed data acquisition system, the CPU utilization rate is low when collecting and recording data, the system compatibility is poor, the packaging and deployment are difficult, and the situation of high data bandwidth Under the problem of low system transmission reliability, the first aspect of the present invention proposes a method for recording Ethernet data streams used in high-speed data acquisition systems. High-speed NVMe SSD construction, the method includes:

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