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Three-dimensional memory device and method for forming same

A technology for memory devices and semiconductors, applied in the fields of semiconductor devices, electric solid-state devices, semiconductor/solid-state device manufacturing, etc., can solve problems such as high cost

Active Publication Date: 2021-08-17
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as memory cell feature sizes approach lower bounds, planarization processes and fabrication techniques become challenging and costly
Therefore, the storage density of flat memory cells is approaching the upper limit

Method used

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  • Three-dimensional memory device and method for forming same

Examples

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Embodiment Construction

[0013] While specific configurations and arrangements are discussed, it should be understood that this is done for illustration purposes only. A person skilled in the relevant art will recognize that other configurations and arrangements may be used without departing from the spirit and scope of the present disclosure. It should be apparent to those skilled in the relevant art that the present disclosure may be used in a variety of other applications as well.

[0014] It should be noted that references in this specification to "one embodiment," "an embodiment," "an example embodiment," "some embodiments," etc. indicate that the described embodiments may include a particular feature, structure, or characteristic. , but each embodiment may not necessarily include the specific feature, structure or characteristic. Furthermore, such phrases are not necessarily referring to the same embodiment. Further, when a specific feature, structure or characteristic is described in conjunct...

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Abstract

Embodiments of 3D memory devices and methods for forming the same are disclosed. In one example, a 3D memory device includes: a P-type doped region of a substrate; an N-type doped semiconductor layer located above the P-type doped region; located above the N-type doped semiconductor layer A storage stack layer comprising interwoven conductive layers and dielectric layers; a channel structure extending vertically through the storage stack layer and the N-type doped semiconductor layer into the P-type doped region; vertically extending into the P-type doped region an N-type doped semiconductor plug in the P-type doped region; and a source contact structure extending vertically through the storage stack layer so as to be in contact with the N-type doped semiconductor plug.

Description

technical field [0001] Embodiments of the present disclosure relate to three-dimensional (3D) memory devices and methods of manufacturing the same. Background technique [0002] Flat memory cells are scaled to smaller sizes through improvements in process technology, circuit design, programming algorithms, and manufacturing processes. However, as memory cell feature sizes approach lower limits, planarization processes and fabrication techniques become challenging and costly. Therefore, the storage density of flat memory cells approaches an upper limit. [0003] 3D memory architectures can address the density limit in flat memory cells. A 3D memory architecture includes a memory array and peripheral devices for controlling signals to and from the memory array. Contents of the invention [0004] Embodiments of 3D memory devices and methods for forming the same are disclosed herein. [0005] In one example, a 3D memory device includes: a P-type doped region of a substrate...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11563H01L27/11568H01L27/11578H01L27/11582
CPCH10B43/00H10B43/30H10B43/20H10B43/27H01L29/41741H01L21/823487
Inventor 吴林春李姗夏志良张坤周文犀霍宗亮
Owner YANGTZE MEMORY TECH CO LTD