Packaging structure and packaging method based on multiple adapter plates
A technology of packaging structure and packaging method, which is applied in the direction of semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve the problems of high process cost and technical difficulty, achieve large size adjustability, and reduce the package area Effect
Active Publication Date: 2020-10-13
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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[0005] In view of the above analysis, the embodiment of the present invention aims to provide a packaging structure based on multiple interposer boards and its manufacturing method, to solve the problems of difficulty and high process cost of using TSV interconnection design technology for the existing packaging structure interposer boards
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[0052]Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the present disclosure. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concept of the present disclosure.
[0053] Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. The figures are not drawn to scale, with certain details exaggerated and possibly omitted for clarity of presentation. The shapes of the various regions and layers shown in the figure, as well as their relative sizes and positional relationships are only exemplary, and may deviate due to manufacturing tolerances or technical limitations in practice, and those skilled in the art will Regions / layers with different shapes, si...
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The invention relates to a packaging structure and a packaging method based on multiple adapter plates, and belongs to the technical field of semiconductor packaging. The invention provides the packaging structure based on multiple adapter plates. The packaging structure is used for packaging at least two chips. The packaging structure comprises a substrate of which the upper part is used for mounting the at least two chips; a first adapter plate which is positioned in the substrate and is used for realizing the interconnection between the at least two chips; and at least two second adapter plates which are located at the upper part of the substrate, wherein the projections of the second adapter plates on the substrate and the projection of the first adapter plate on the substrate at leastpartially do not coincide; the second adapter plates are used for being interconnected with the first adapter plate, and the part, which is not overlapped with the projection of the first adapter plate on the substrate, of each second adapter plate is used for realizing the interconnection between one chip and an external signal. Silicon vias do not need to be manufactured on the adapter plates,the process is simple, and the manufacturing cost is low.
Description
technical field [0001] The invention relates to the technical field of semiconductor packaging, in particular to a packaging structure based on a multi-transfer board and a manufacturing method thereof. Background technique [0002] With the development of miniaturization, integration, and intelligentization of electronic products, the complexity of chips is greatly increasing, the number of corresponding I / Os pins is also greatly increasing, and the complexity of packaging has increased. [0003] However, due to the limitation of the wiring size of the current packaged organic substrate, it is impossible to directly realize the interconnection between chips with high-density I / Os or the direct interconnection between chips and substrates through the substrate process, or the number of substrate layers needs to be increased, and the cost is high. The yield rate is lower. [0004] The interposer board in the existing packaging structure is usually designed using Through Sili...
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IPC IPC(8): H01L23/538H01L23/535H01L21/50H01L25/065H01L21/98
CPCH01L23/5386H01L23/535H01L21/50H01L25/0655H01L25/50
Inventor 王启东丁才华万伟康
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI