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Cross-clock domain system

A technology of clock domain and tags, applied in the field of many-to-one cross-clock domain systems, to achieve the effect of maintaining integrity

Active Publication Date: 2022-04-26
AIROHA TECH (SUZHOU) LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Propagation delay caused by a resistance, a capacitance, and / or an inductance of a line, interference between multiple signals, or variability of multiple drivers can be various causes of skew effects

Method used

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Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0063] First embodiment: the tagger attaches the tag to the starting point of the information stream

[0064] Figure 4 The cross-clock domain system and its operation of the first embodiment of the present invention are shown. This embodiment is extended based on the generalized embodiment, so please refer to the description of the generalized embodiment for the same elements, structures, functions or effects.

[0065] It is assumed that a plurality of information streams of a plurality of transmission clock domain devices (for example, respectively having a plurality of transmission clock domains A, B, . . . , and F) contain Na, Nb, . . . non-negative integer) consecutive sent samples (eg, letters).

[0066] The tagger may mark the information stream in any pattern such that the first transmitted sample is identifiable by a receive clock domain device (eg, having a receive clock domain Z). For example, the tagger may mark a logical '1' (logic symbol) on the first sent let...

no. 2 example

[0069] Second embodiment: the tagger attaches a tag to any selected group of interest

[0070] Figure 5 The cross-clock domain system and its operation of the second embodiment of the present invention are shown. This embodiment is extended based on the generalized embodiment, so please refer to the description of the generalized embodiment for the same elements, structures, functions or effects.

[0071] It is assumed that a plurality of information streams of a plurality of transmission clock domain devices (for example, respectively having a plurality of transmission clock domains A, B, . . . , and F) contain Na, Nb, . . . non-negative integer) consecutive sent samples (eg, letters). exist Figure 5 Among them, Na, Nb, ... and Nf are equal numbers, which are just examples, and they may be unequal numbers to each other.

[0072] The tagger can tag the information stream in any pattern such that any selected set of transmitted samples can be identified by a receive clock...

no. 3 example

[0075] The third embodiment: many-to-one data-assisted training across the time pulse domain

[0076] Figure 6a and Figure 6b The cross-time pulse domain system 3 and its operation of the third embodiment of the present invention are shown.

[0077] The cross-clock domain system 3 of this embodiment includes various clock domain devices 31A to 31F and 32 (for example, respectively having a plurality of sending clock domains A to F and a receiving clock domain Z). Each transmit clock domain device (respectively marked 31A-31F) is provided with a digital processor (respectively marked 311A-311F), a tagger (respectively marked 312A-312F), and a synchronizer (respectively marked 313A-312F) 313F), and contains an unknown training sequence (respectively marked as UTS1 to UTS6) and a tag stream generated by the tagger (respectively marked as TAG1 to TAG6).

[0078] The taggers ( 312A to 312F ) of the transmit clock domain devices ( 31A to 31F ) tag each data of the information s...

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Abstract

A cross-clock domain system includes a plurality of sending clock domain devices and a receiving clock domain device. Each sending clock domain device contains an information stream and a label stream generated by a labeler; wherein, the multiple information streams of the multiple sending clock domain devices become multiple asynchronous during transmission information flow. The receiving clock domain device receives the plurality of asynchronous information streams and the plurality of tag streams from different sending clock domain devices, the receiving clock domain device includes a synchronizer, the synchronizer is the plurality of The asynchronous information streams are synchronized according to the plurality of label streams to restore the plurality of information streams.

Description

technical field [0001] The present invention relates to a digital circuit, in particular to a digital circuit crossing the clock domain, and more specifically, to a many-to-one cross-clock domain system, a synchronization method and a training method thereof. Background technique [0002] Modern digital circuits often involve the cooperation of various clock domain circuits. A data transmitting module can be in the first clock domain and operate with the first clock, and a data receiving module can be in the second clock domain and operate with the second clock, especially, the two may not be synchronized. [0003] In addition, the respective transmission paths of multiple clock signals may cause a clock-skew effect between these clock signals. Skew effects refer to the time delay or offset between two signals. Propagation delay caused by a resistance, a capacitance, and / or an inductance of a line, interference between signals, or variability of drivers may be various reas...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/42
CPCG06F13/42
Inventor 陈少涵庄栋明王士玮
Owner AIROHA TECH (SUZHOU) LTD