Process address space isolation protection method and device in operating system, equipment
An address space and operating system technology, applied in the field of the Internet of Things, can solve problems such as process address space isolation protection
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Embodiment 1
[0077] This embodiment is implemented on Kanzhi K210, which is a chip based on RISC-V64-bit architecture, and implements a memory protection unit PMP for each CPU core.
[0078] image 3It is a schematic diagram of the device module of Embodiment 1 of the present application, wherein the SYSTEM_ADDR_Table table in the recording module 100 includes PROCESS_ID, PROCESS_ADDR_Count, PROCESS_ADDR_Cfg [N] and PROCESS_Address [N], PROCESS_ADDR_Cfg and PROCESS_Address form a protection entry corresponding to PMPentry one by one, For example, the protection entry composed of PROCESS_ADDR_Cfg[0] and PROCESS_Address[0] corresponds to MPUentry0, and so on. The length N of the configuration array and the address array is 16, each element of the configuration array is 8 bits, and each element of the address array is 64 bits. Among them, PROCESS_Address[0] ~ PROCESS_Address[15] are mapped one by one with the PMP address register pmpaddr[0]~pmpaddr[15]. And PROCESS_ADDR_Cfg[0]~ PROCESS_ADDR...
Embodiment 2
[0105] STM32F4Discovery is a development board based on ARM 32-bit architecture. The memory protection unit MPU (Memory Protection Unit) is implemented on STM32F4Discovery. Figure 5 It is a schematic diagram of the device module of Embodiment 2 of the present invention. Such as figure 2 As shown, the isolation protection device 10 provided by the present invention can be easily integrated into the embedded system of the STM32 series.
[0106] In the first module, the system address space protection table unit is included. The SYSTEM_ADDR_Table table in the recording module 100 includes the memory address space configuration array and address array of each process. The length N of the configuration array and address array is 8, corresponding to 8 MPUs. Region configuration information, each protection entry of the process corresponds to a region of the MPU, for example, the protection entry composed of PROCESS_ADDR_Cfg[0] and PROCESS_Address[0] corresponds to the MPUregion[0...
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