BPSK signal-to-noise ratio calculation design method based on FPGA ARM

A design method and signal-to-noise ratio technology, applied in the field of signal-to-noise ratio calculation, can solve problems such as carrier phase offset, and achieve the effects of low complexity, high calculation accuracy, and wide estimation range

Pending Publication Date: 2020-11-13
南京天际行云科技有限公司
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Problems solved by technology

[0003] At present, most of the BPSK signal-to-noise ratio calculation methods use the maximum likelihood signal-to-noise ratio estimation method for calculation, but the traditional maximum-likelihood signal-to-noise ratio estimation method for binary phase-shift keying signals needs data assistance, and most of them can only Estimated after symbol synchronization and must not have residual carrier phase offset

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Embodiment Construction

[0024] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Apparently, the described embodiments are only some of the embodiments of the present invention, not all of them.

[0025] The BPSK signal-to-noise ratio calculation design method based on FPGA ARM includes the following steps:

[0026] Step 1: Data sampling transmission, acquire BPSK sampling signal from the source through matched filter, and preprocess the BPSK sampling signal, obtain the virtual and real data of the signal power of the BPSK sampling signal according to the phase offset, and convert the virtual , Real two-way data transmission to the cumulative calculation module for processing;

[0027] Step 2: Accumulation calculation, after the signal square processing is performed by the accumulation calculation module, the virtual and real data are accumulated;

[0028] Step 3: mean value...

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Abstract

The invention discloses a BPSK signal-to-noise ratio calculation design method based on an FPGA ARM. The method comprises the following steps: step 1, data sampling transmission: acquiring a BPSK sampling signal from an information source through a matched filter, preprocessing the BPSK sampling signal, acquiring virtual and real data in the signal power of the BPSK sampling signal according to phase offset, and transmitting the virtual and real data to an accumulation calculation module for processing; and step 2, accumulation calculation: accumulating virtual and real data after signal square processing is carried out through an accumulation calculation module. According to the method, the phase modulation in the signal is removed by utilizing the quadratic method, so that data assistance is not needed any more; the in-phase channel and the orthogonal channel are respectively processed, and the phase offset influence of the demodulation carrier is processed according to a well combination estimation result; grouping estimation is directly carried out on the sample values obtained after analog-to-digital conversion, symbol synchronization is not needed, the estimation range is wide, and the BPSK signal-to-noise ratio calculation design method based on the FPGA ARM is low in complexity and high in calculation precision.

Description

technical field [0001] The invention relates to the technical field of signal-to-noise ratio calculation, in particular to an FPGA ARM-based BPSK signal-to-noise ratio calculation design method. Background technique [0002] The signal-to-noise ratio is a main technical index to measure the reliability of the communication quality of the communication system. According to different needs in the communication, there are different expressions. In the transmission of modulated signals, the signal-to-noise ratio generally refers to the channel output, that is, the receiver input The ratio of the average power of the carrier signal at the terminal to the average power of the noise in the channel can be called the carrier-to-noise ratio. ratio. In engineering, a set of curves between the input signal-to-noise ratio and the output signal-to-noise ratio of the demodulator is also used to quantitatively compare the communication quality of different analog modulation and demodulatio...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04B17/336H04L27/00H04L27/20H04L27/227
CPCH04B17/336H04B1/69H04L27/0014H04L27/20H04L27/2278H04L2027/0026
Inventor 李志强
Owner 南京天际行云科技有限公司
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