Programming method capable of reducing programming interference of memory cell difficult to program

Abstract

The invention relates to a programming method capable of reducing programming interference of a storage unit difficult to program. The method comprises the following steps of S1, programming operationbeing conducted on the storage unit of a storage area of an NAND FLASH through programming voltage; S2, performing first verification operation on the programmed memory cell by adopting the first verification voltage, and if the verification succeeds, entering the step S3; if the verification fails, returning to the step S1; S3, performing a second verification operation on the programmed memorycell by adopting a second verification voltage, and if the verification is successful, ending; if the verification fails, entering the step S4; wherein the first verification voltage is smaller than the second verification voltage; S4, adding 1 to the number of cycles for counting, and ending if the number of cycles reaches a preset number-of-cycles threshold value; if not, executing the step S5;and S5, increasing the programming voltage, and then returning to the step S1. The programming method is novel in design, and programming interference can be effectively reduced.

Description

technical field [0001] The present invention relates to the field of memory, and in particular to a NANDFLASH programming method that can reduce the programming interference of difficult-to-program memory cells. of memory cells have always failed verification, defining these memory cells as difficult to program. Background technique [0002] In the application of NAND FLASH, the memory cell adopts a floating gate structure, placing electrons in the floating gate structure is regarded as a programming / writing operation, and removing electrons is regarded as an erasing operation. Both the erase operation and the programming operation are based on the F-N tunneling principle. The erasing operation is specifically: apply 0V to the gate, and apply a high voltage to the substrate (take 18V as an example), so that the threshold voltage of the erased memory cell is a negative value; the programming operation is specifically: apply a high voltage to the gate, While 0V is applied to...

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Problems solved by technology

[0013] Since the above-mentioned prior art adopts a fixed verification voltage, if some difficult-to-program memory cells appear in the storage area, it needs to be programmed 12 times, and the current storage area will be subjected to 12 programming disturbances and transmission disturbances. In severe cases, 8.5 The number of V transmission interference can reach 370 times

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