Memory device, recessed channel array transistor and preparation method thereof

Abstract

The invention provides a storage device, a recessed channel array transistor and a preparation method thereof, and belongs to the technical field of storage. The preparation method of the recessed channel array transistor comprises the steps of forming a substrate, a first semiconductor layer, a second semiconductor layer and a third semiconductor layer which are stacked in sequence; implanting first ions into the first semiconductor layer; implanting second ions of the same type as the first ions into the second semiconductor layer, wherein the implantation dose is greater than that of the second ions; forming a groove channel with an opening in the third semiconductor layer and extending to the first semiconductor layer; injecting third ions opposite to the first ions in type through thebottom of the groove channel, wherein the difference between the implantation dose of the first ions and the implantation dose of the second ions is smaller than the implantation dose of the third ions; forming a gate insulating layer and a gate; and injecting fourth ions opposite to the second ions in type into the third semiconductor layer. According to the preparation method of the recessed channel array transistor, the uniformity of the threshold voltage of the recessed channel array transistor can be improved.

Description

technical field [0001] The present disclosure relates to the field of storage technology, in particular to a storage device, a recessed channel array transistor and a manufacturing method thereof. Background technique [0002] With the continuous reduction of device size, recess channel access transistor (recess channel access transistor, RCAT) can be applied in DRAM (Dynamic Random Access Memory). However, as the size of the recessed channel array transistor decreases, the curvature effect of the trench channel is more obvious, resulting in a larger difference in the threshold voltage of the transistor at different positions in the trench channel, which reduces the performance of the recessed channel array transistor. . [0003] The above information disclosed in this Background section is only for enhancement of understanding of the background of the disclosure and therefore it may contain information that does not form the prior art that is already known in the art to a ...

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Problems solved by technology

However, as the size of the recessed channel array transistor decreases, the curvature effect of the trench channel is more obvious, resulting in a larger difference in the threshold voltage of the transistor at different positions in the trench channel, which reduces the performance of the recessed channel array transistor.

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