Electrical testing method for threshold voltage uniformity of memory

A threshold voltage and electrical testing technology, used in static memory, semiconductor/solid-state device testing/measurement, instruments, etc., can solve the problem of inability to know the uniformity of the array threshold voltage, inability to test the threshold voltage and distribution, and prolong the time of memory development. and other problems, to achieve the effect of short test time, simple test, and reduced development time

Pending Publication Date: 2021-03-12
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this test structure can only test the threshold voltage of a limited number of memory cells in the array. For example, the test of 4 memory cells requires a test structure with more than 5 pins. If testing the threshold voltage of all memory cells in the array requires many pins , it is impossible to realize under the limited area of ​​the test structure, so the threshold voltage and distribution of the entire array cannot be tested through the testkey (test structure), and the threshold voltage uniformity of the entire array cannot be known.
Moreover, the evaluation of the uniformity of the threshold voltage of the memory cell in the prior art also requires the design of a complete test circuit, including the peripheral erasing and writing operation circuit and the reading circuit, and at the same time needs to establish a special test program, which requires a relatively long time and investment, prolonging the memory development time

Method used

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  • Electrical testing method for threshold voltage uniformity of memory
  • Electrical testing method for threshold voltage uniformity of memory
  • Electrical testing method for threshold voltage uniformity of memory

Examples

Experimental program
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Effect test

Embodiment 1

[0042] Please refer to figure 1 , the present invention provides a storage unit, comprising: a substrate, a base region 110 located in the substrate, a selection transistor 120 and a storage transistor 130 located on the surface of the substrate and having a certain distance, and a selection transistor 120- The source line 140 on the side, the bit line 150 on one side of the storage tube 130, the selection tube 120 and the storage tube 130 are located between the source line 140 and the bit line 150, the selection tube 120 is located on the substrate The selector word line 121 on the bottom surface, and the oxide layers on both sides of the selector wordline 121 . The storage tube 130 includes: a storage tube word line 131 , a first ONO layer 132 located on both sides of the storage tube word line 131 , and a second ONO layer 133 between the storage tube word line 131 and the substrate. The structure of the memory cell is the prior art, so I won’t go into details here, but he...

Embodiment 2

[0061] refer to Figure 4 , if the memory cell includes: a base region 210, a storage tube 230 located on the substrate surface, a source line 240 located on one side of the storage tube 230, a bit line 250 located on the other side of the storage tube 230, the storage tube 230 All located between the source line 240 and the bit line 250, the storage tube 230 includes: a storage tube word line 231, a first ONO layer 232 located on both sides of the storage tube word line 2131, and the storage tube word line 231 and A second ONO layer 233 between the substrates.

[0062] Therefore, please refer to Figure 5 For the case of only the storage tube, the present invention also provides an electrical test method for the uniformity of the threshold voltage of the memory, the electrical test method comprising:

[0063] S21: Connect the source lines of all memory cells, the bit lines of all memory cells, and the base regions 210 of all memory cells;

[0064] S22: applying a scanning ...

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Abstract

The invention provides an electrical property test method for threshold voltage uniformity of a memory, which comprises the following steps of: applying a first voltage to a selection tube to enable the selection tube to be always opened; connecting the source connecting lines of all the storage units; connecting the bit lines of all the storage units; connecting the base regions of all the storage units; applying a second voltage to the memory tube, wherein the second voltage is a scanning voltage; applying a pulse voltage to the storage tube once when the second voltage changes once; measuring the current of the base region; making the values of the current and the second voltage of the base region into a threshold voltmeter; keeping current of the base region is kept constant, wherein the smaller the change amplitude of the second voltage is, the more uniform the threshold voltage of the memory is. According to the invention, the threshold voltages of all the memory cells can be simultaneously tested without using an additional test structure so as to judge whether the threshold voltages of the memory are uniform or not, the test is simple, a test program does not need to be written, the test time is short, and the memory development time is reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an electrical test method for the uniformity of the threshold voltage of a memory. Background technique [0002] In memory development, the threshold voltage uniformity of each memory cell is an important indicator of memory cell technology. In the existing technology, taking 2T memory cells as an example, the memory cells are arranged in an array, and the main distance between each memory cell is The connection end includes a word line of the selection transistor (SG word line), a word line of the storage pipe (word line), a source line (source line), a drain area (drain line), and a base area. [0003] After the storage unit is manufactured, it is necessary to perform an electrical test. In the electrical test (WAT) stage after the storage unit tape-out is completed, the method used in the prior art is to set test structures around the test unit, and each test structure ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/12H01L21/66
CPCG11C29/12G11C2029/1202G11C2029/1204H01L22/14
Inventor 唐小亮李妍辻直樹陈昊瑜
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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