Memory device and reading method thereof

Abstract

A memory device and a method for reading the memory device are provided. The memory device includes: a memory cell array and a control unit. The memory cell array includes a plurality of memory cell which are arranged in rows and columns, the memory cells located in the same row are connected to one word line, and the memory cells located in the same column are connected to one bit line; and the control unit is coupled to the memory cell array and configured to: divide the plurality of memory cells connected to the selected word line into a plurality of groups based on threshold voltages of the plurality of memory cells connected to the selected word line; when a plurality of memory cells connected to adjacent word lines of a selected word line are read, a sensing node coupled to each bitline is pre-discharged based on grouping information of the plurality of memory cells to drop a predetermined voltage, the plurality of memory cells connected to the adjacent word lines are programmedbefore the plurality of memory cells connected to the selected word line are programmed; and a read voltage is applied to the adjacent word lines to read memory information of the plurality of memorycells connected to the adjacent word lines.

Description

technical field [0001] The present invention generally relates to a memory device and a reading method thereof, and more particularly, to a memory device for correcting a coupling effect between adjacent memory cells and a reading method thereof. Background technique [0002] When programming memory cells, especially for multi-level cells, incremental stepping pulse programming is often used. Incremental step pulse programming can use incremental voltage pulses to inject electrons into charge storage elements, such as floating gates or charge trapping layers, thereby increasing the threshold voltage of memory cells to store information. [0003] The study found that there is a coupling effect between adjacent memory cells programmed at different times. like figure 1 As shown in , taking a 2×2 memory cell array as an example, first, program the memory cells A and B connected to the word line WL(n), and their threshold voltages after programming are Vt(n_1) and Vt(n_2 ). T...

AI Technical Summary

Problems solved by technology

In the case where there is a shift in the threshold voltage of the memory cell, the information stored in the memory cell cannot be read correctly

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