Forming method of interconnection structure and interconnection structure

Abstract

The invention discloses an interconnection structure and a forming method thereof, and the method comprises the steps: forming a first groove in a first region of a dielectric layer, and forming a second groove in a second region of the dielectric layer, wherein the width of the first groove is smaller than that of the second groove; forming a barrier layer on the side wall of the first groove and the side wall of the second groove, wherein the top surface of the barrier layer is lower than the top surface of the dielectric layer; etching the dielectric layer at the side part of the first groove and the side part of the second groove to enable the top surface of the residual dielectric layer on the second region to be higher than the top surface of the residual dielectric layer on the first region; forming a groove filling material layer in the first groove and the second groove and on the tops of the dielectric layer and the barrier layer; and grinding the groove filling material layer and the dielectric layer until the top surface of the barrier layer is exposed so as to form a first conductive filling layer in the first groove and form a second conductive filling layer in the second groove. The method reduces the height difference between the top surface of the first conductive filling layer and the top surface of the second conductive filling layer.

Description

technical field [0001] The invention relates to the field of semiconductor technology, in particular to a method for forming an interconnection structure and the interconnection structure. Background technique [0002] In the manufacturing process of semiconductor integrated circuits, the interconnection process is a common processing process, and the interconnection process is usually used to form structures such as metal interconnection lines. The existing interconnection process usually includes, for example, forming a barrier layer on the substrate, and Forming trenches on the barrier layer, and depositing trench filling materials (such as metal materials used to form metal interconnections) in the trenches, etc., and usually requires chemical mechanical polishing (CMP) to remove Excess barrier and trench fill material. In the CMP process, because the barrier layer and the trench filling material layer in the area with a large trench size are generally more likely to be...

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Problems solved by technology

[0003] The purpose of the present invention is to solve the problem in the prior art that the interconnection structure formed by the formation method of the interconnection structure affects the stability and reliability of the semiconductor device

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