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Method for calculating maximum absolute output error of approximate arithmetic logic circuit

A technology of arithmetic logic and calculation method, which is applied in the calculation field of the maximum absolute output error of an approximate arithmetic logic circuit, and achieves the effect of high operation efficiency

Active Publication Date: 2021-05-28
NINGBO UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, when there are many input variables of the approximate arithmetic logic circuit to be processed, the exhaustive method is used to solve η max , computational efficiency is facing a huge challenge

Method used

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  • Method for calculating maximum absolute output error of approximate arithmetic logic circuit
  • Method for calculating maximum absolute output error of approximate arithmetic logic circuit
  • Method for calculating maximum absolute output error of approximate arithmetic logic circuit

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Embodiment Construction

[0033] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0034] The calculation method of the maximum absolute output error of a kind of approximate arithmetic logic circuit that the present invention proposes, it comprises the following steps:

[0035] Step 1: Let Z ap Indicates an approximate arithmetic logic circuit, Z ap There are N input variables, Z ap There are K output variables; and let Z org means Z ap The corresponding primitive arithmetic logic circuit, Z org There are also N input variables, Z org There are also K output variables, Z org The output of is error-free; the Z ap The output is defined as O ap , the Z org The output is defined as O org , will O ap The i-th bit of is denoted as O iap , will O org The i-th bit of is denoted as O iorg , and stipulate O ap The highest and lowest bits correspond to O Kap and O 1ap , stipulate O org The highest and lowest bits cor...

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Abstract

The invention discloses a method for calculating the maximum absolute output error of an approximate arithmetic logic circuit, which is used for calculating the maximum absolute output error by comparing the difference between two logic covers corresponding to an output logic function between the approximate arithmetic logic circuit and an original arithmetic logic circuit. The difference between the two logic coverage can be solved through the disjoint operation between the logic coverage, and the calculation efficiency based on the logic coverage disjoint operation is related to the number of product terms corresponding to the logic coverage and is not sensitive to variable numbers contained in logic coveragein consideration of the exponential power relationship of 2 between the input combination number and the input variable number of the arithmetic logic circuit; therefore, in terms of operation efficiency, especially when a logic function with more input variables is processed, the operation efficiency of the method is higher, and the method is more suitable for processing a large circuit.

Description

technical field [0001] The present invention relates to a digital logic circuit, in particular to a method for calculating the maximum absolute output error of an approximate arithmetic logic circuit. The calculation of the maximum absolute output error between the original arithmetic logic circuit and the logic functions of the approximate arithmetic logic circuit are expressed in the form of "and / or". Background technique [0002] In general, the correct logic function is the first condition for the design of arithmetic logic circuits. In order to ensure the correct output of the arithmetic logic circuit, performance indicators such as power consumption, area and speed of the arithmetic logic circuit are often sacrificed. However, in practical applications, certain characteristics of the data to be processed, such as fault-tolerant characteristics, make calculation errors to a certain extent not affect the actual application. For example, in multimedia processing, certai...

Claims

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Application Information

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IPC IPC(8): G06F30/327G06F117/02
CPCG06F30/327G06F2117/02
Inventor 王雪王伦耀夏银水储著飞
Owner NINGBO UNIV
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