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A PTP-based multi-link delay jitter optimization method and device

A technology of time delay jitter and optimization method, which is applied in synchronization devices, wireless communication, electrical components, etc., can solve problems such as terminal clock fluctuation, and achieve the effects of high accuracy, high reliability and good timeliness

Active Publication Date: 2022-07-15
CASCO SIGNAL
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Problems solved by technology

[0003] However, when there are multiple links at the same time, according to the PTP protocol, the terminal can only select one of the links for clock compensation, even if the link has a large frequency due to clock path asymmetry, congestion, frequency offset, and error. delay jitter, and will not perform link switching
And when link switching occurs, it will cause large fluctuations in the terminal clock

Method used

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  • A PTP-based multi-link delay jitter optimization method and device
  • A PTP-based multi-link delay jitter optimization method and device

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Embodiment Construction

[0040] The PTP-based multi-link delay jitter optimization method of the present invention calculates the jitter parameters of different links by recording the basic clock compensation of different links, and calculates the link jitter evaluation value of different links by means of weighted average. After evaluating the jitter values ​​of different links, select the basic clock compensation of a link as the clock compensation value for this adjustment. Compared with the prior art, the present invention has the advantages of high reliability, high accuracy, strong timeliness, etc., and avoids the disadvantages that the link fixation cannot be selected and the jitter is large when the PTP terminal performs multi-link clock synchronization. Better guarantee of clock synchronization.

[0041] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the presen...

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Abstract

The invention relates to a multi-link delay jitter optimization method based on PTP. The method calculates the jitter parameters of different links by recording the basic clock compensation of different links, and calculates the link jitter evaluation value of different links. After comparing the jitter evaluation values ​​of different links, select the basic clock compensation of a link as the clock compensation value for this adjustment. Compared with the prior art, the present invention has the advantages of high reliability, high accuracy, strong timeliness and the like.

Description

technical field [0001] The present invention relates to time synchronization technology, in particular to a method and device for optimizing multi-link delay jitter based on PTP (Precision Time Protocol, Precision Time Protocol). Background technique [0002] With the widespread use of LTE technology and the requirement of clock synchronization consistency of each device in the system, PTP clock synchronization technology is widely used in communication transmission networks. For example, Chinese Patent Publication No. CN111181555A discloses a PTP clock synchronization system and clock synchronization method . [0003] However, when there are multiple links at the same time, according to the PTP protocol, the terminal can only select one of the links for clock compensation, even if the link is relatively large due to the asymmetry, congestion, frequency offset and error of the clock path, etc. delay jitter, and no link switch will be performed. And when link switching occu...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04W56/00
CPCH04W56/004
Inventor 马钰昕马征韩熠苏阿峰黄辉周庭梁刘螺辉金思新
Owner CASCO SIGNAL
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