Multi-channel high-speed serial LVDS data ordering method and circuit based on FPGA

A high-speed serial, multi-channel technology, applied in parallel/serial conversion, electrical components, analog-to-digital converters, etc., can solve problems such as data processing exceptions that cannot be solved

Active Publication Date: 2021-07-06
SHANTOU DONGFANG ULTRASONIC TECH
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  • Multi-channel high-speed serial LVDS data ordering method and circuit based on FPGA
  • Multi-channel high-speed serial LVDS data ordering method and circuit based on FPGA

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Embodiment Construction

[0027] refer to Figure 1-2 , a FPGA-based multi-channel high-speed serial LVDS data ordering method, comprising the steps:

[0028] S01, the analog-to-digital conversion chip is set to a fixed test code output mode, and the serial differential data test codes output by each output port of the analog-to-digital conversion chip are respectively output to the corresponding one-to-one corresponding to each output end of the analog-to-digital conversion chip in the FPGA Automatic sequencer module; each automatic sequencer module includes at least a data stream delayer, a timing adjustment controller, a serial-to-parallel conversion module and a controllable shift converter, and the serial output from the output port of the analog-to-digital conversion chip The row differential data test code is output to the data stream delayer corresponding to the auto-sequencing module.

[0029] S02. Output the delay adjustment value of the timing adjustment controller to the data stream delaye...

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Abstract

The invention relates to the technical field of ultrasonic data processing, in particular to a multi-channel high-speed LVDS data ordering method and circuit based on an FPGA. According to the technical scheme, each output port of each channel of each analog-to-digital conversion chip is correspondingly provided with an automatic ordering module on an FPGA chip, and each different output end of each analog-to-digital conversion chip is accurately set by the automatic ordering module when the power-on is started every time, so that the difference influence caused by the difference of hardware parameters of different output ends at different environment temperatures is overcome. The method has the advantages that dynamic optimal time sequence search and adjusment are carried out after each time of power-on, the problem that time delay differences exist between different circuit boards and different FPGA devices at different environment temperatures is effectively solved, and the correctness and stability of obtained sampling data are ensured. Meanwhile, respective channels are ordered independently in parallel, so that the adaption to the difference of each channel can be ensured to the greatest extent, and the ordering efficiency is also effectively improved.

Description

technical field [0001] The invention relates to the technical field of ultrasonic data processing, in particular to an FPGA-based multi-channel high-speed LVDS data sorting method and circuit. Background technique [0002] With the continuous popularization and application of ultrasonic phased array and omni-focusing technology, more and more probe array elements and hardware channels are supported. At the same time, the higher the frame rate directly related to the scanning speed, the better. The front-end of ultrasonic phased array and total focusing technology currently has a multi-channel high-speed serial analog-to-digital converter ADC using LVDS interface to sample the received signal. Due to differences in ambient temperature, FPGA logic resources and timing, and differential signal routing of the circuit board, it is easy to cause differences in signal transmission delays, which will affect the stable acquisition of normal high-speed front-end signal data on the FPG...

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Application Information

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IPC IPC(8): H03M9/00H03M1/12
CPCH03M9/00H03M1/12
Inventor 陈智发谢晓宇李冈宇吴锦湖
Owner SHANTOU DONGFANG ULTRASONIC TECH
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